* [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter
@ 2013-09-26 19:33 Jesse Barnes
2013-09-26 19:33 ` [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency Jesse Barnes
2013-09-26 21:00 ` [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter Ben Widawsky
0 siblings, 2 replies; 7+ messages in thread
From: Jesse Barnes @ 2013-09-26 19:33 UTC (permalink / raw)
To: intel-gfx
And add some reg defines while we're at it. Since the units of the RC6
residency counter are actually in CZ clocks, we want to just use the
high bits or we'll overflow too frequently.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++++
drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 00fda45..cf995bb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4721,6 +4721,10 @@
GEN6_PM_RP_DOWN_TIMEOUT)
#define GEN6_GT_GFX_RC6_LOCKED 0x138104
+#define VLV_COUNTER_CONTROL 0x138104
+#define VLV_COUNT_RANGE_HIGH (1<<15)
+#define VLV_MEDIA_RC6_COUNT_EN (1<<1)
+#define VLV_RENDER_RC6_COUNT_EN (1<<0)
#define GEN6_GT_GFX_RC6 0x138108
#define GEN6_GT_GFX_RC6p 0x13810C
#define GEN6_GT_GFX_RC6pp 0x138110
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d27eda6..d8bdc98 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3827,7 +3827,10 @@ static void valleyview_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
/* allows RC6 residency counter to work */
- I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
+ I915_WRITE(VLV_COUNTER_CONTROL,
+ _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
+ VLV_MEDIA_RC6_COUNT_EN |
+ VLV_RENDER_RC6_COUNT_EN));
if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
rc6_mode = GEN7_RC_CTL_TO_MODE;
I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency
2013-09-26 19:33 [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter Jesse Barnes
@ 2013-09-26 19:33 ` Jesse Barnes
2013-09-26 22:25 ` Chris Wilson
2013-09-26 21:00 ` [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter Ben Widawsky
1 sibling, 1 reply; 7+ messages in thread
From: Jesse Barnes @ 2013-09-26 19:33 UTC (permalink / raw)
To: intel-gfx
We need to use the clock control reg to figure out how many CZ clks are in
30ns and use that as the basis for our RC6 residency calculations.
References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cf995bb..6f8d0cf 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1797,6 +1797,9 @@
*/
#define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE)
+#define VLV_CLK_CTL2 0x101104
+#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
+
/*
* Overlay regs
*/
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 44f4c1a..9c60515 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
{
struct drm_i915_private *dev_priv = dev->dev_private;
u64 raw_time; /* 32b value may overflow during fixed point math */
+ u64 units = 128ULL, div = 100000ULL;
if (!intel_enable_rc6(dev))
return 0;
- raw_time = I915_READ(reg) * 128ULL;
- return DIV_ROUND_UP_ULL(raw_time, 100000);
+ /* On VLV, residency time is in CZ units rather than 1.28us */
+ if (IS_VALLEYVIEW(dev)) {
+ u32 clkctl2;
+
+ clkctl2 = I915_READ(VLV_CLK_CTL2) >>
+ CLK_CTL2_CZCOUNT_30NS_SHIFT;
+ if (!clkctl2) {
+ WARN(!clkctl2, "bogus CZ count value");
+ return 0;
+ }
+ units = DIV_ROUND_UP_ULL(3000ULL, (u64)clkctl2);
+ if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
+ units <<= 8;
+
+ div = 100000000;
+ }
+
+ raw_time = I915_READ(reg) * units;
+ return DIV_ROUND_UP_ULL(raw_time, div);
}
static ssize_t
--
1.8.3.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter
2013-09-26 19:33 [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter Jesse Barnes
2013-09-26 19:33 ` [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency Jesse Barnes
@ 2013-09-26 21:00 ` Ben Widawsky
1 sibling, 0 replies; 7+ messages in thread
From: Ben Widawsky @ 2013-09-26 21:00 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Thu, Sep 26, 2013 at 12:33:20PM -0700, Jesse Barnes wrote:
> And add some reg defines while we're at it. Since the units of the RC6
> residency counter are actually in CZ clocks, we want to just use the
> high bits or we'll overflow too frequently.
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
> 2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 00fda45..cf995bb 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4721,6 +4721,10 @@
> GEN6_PM_RP_DOWN_TIMEOUT)
>
> #define GEN6_GT_GFX_RC6_LOCKED 0x138104
> +#define VLV_COUNTER_CONTROL 0x138104
> +#define VLV_COUNT_RANGE_HIGH (1<<15)
> +#define VLV_MEDIA_RC6_COUNT_EN (1<<1)
> +#define VLV_RENDER_RC6_COUNT_EN (1<<0)
> #define GEN6_GT_GFX_RC6 0x138108
> #define GEN6_GT_GFX_RC6p 0x13810C
> #define GEN6_GT_GFX_RC6pp 0x138110
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d27eda6..d8bdc98 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3827,7 +3827,10 @@ static void valleyview_enable_rps(struct drm_device *dev)
> I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
>
> /* allows RC6 residency counter to work */
> - I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
> + I915_WRITE(VLV_COUNTER_CONTROL,
> + _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
> + VLV_MEDIA_RC6_COUNT_EN |
> + VLV_RENDER_RC6_COUNT_EN));
> if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
> rc6_mode = GEN7_RC_CTL_TO_MODE;
> I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
I wonder if the counters use power ie. only enable them when we are
using rc6.
Otherwise, it's:
Requested-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
--
Ben Widawsky, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency
2013-09-26 19:33 ` [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency Jesse Barnes
@ 2013-09-26 22:25 ` Chris Wilson
2013-09-26 22:34 ` Jesse Barnes
0 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2013-09-26 22:25 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Thu, Sep 26, 2013 at 12:33:21PM -0700, Jesse Barnes wrote:
> We need to use the clock control reg to figure out how many CZ clks are in
> 30ns and use that as the basis for our RC6 residency calculations.
Hmm, that was confusing. Took a couple of reads to be sure that the
specs said that the units were always CZ clock cycles.
> References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cf995bb..6f8d0cf 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1797,6 +1797,9 @@
> */
> #define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE)
>
> +#define VLV_CLK_CTL2 0x101104
> +#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
> +
> /*
> * Overlay regs
> */
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 44f4c1a..9c60515 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> u64 raw_time; /* 32b value may overflow during fixed point math */
> + u64 units = 128ULL, div = 100 000ULL;
The ULL suffix here are superfluous and I notice that you didn't use the
suffix for the later constants. Be consistent.
Normal units = 128 / (100 * 1000), i.e. each unit is 1.28/1000ms
>
> if (!intel_enable_rc6(dev))
> return 0;
>
> - raw_time = I915_READ(reg) * 128ULL;
> - return DIV_ROUND_UP_ULL(raw_time, 100000);
> + /* On VLV, residency time is in CZ units rather than 1.28us */
> + if (IS_VALLEYVIEW(dev)) {
> + u32 clkctl2;
> +
> + clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> + CLK_CTL2_CZCOUNT_30NS_SHIFT;
> + if (!clkctl2) {
> + WARN(!clkctl2, "bogus CZ count value");
> + return 0;
> + }
> + units = DIV_ROUND_UP_ULL(3000ULL, (u64)clkctl2);
For your divisor, this should 30*1000 not 3*1000.
> + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> + units <<= 8;
> +
> + div = 100 000 000;
> + }
> +
> + raw_time = I915_READ(reg) * units;
> + return DIV_ROUND_UP_ULL(raw_time, div);
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency
2013-09-26 22:25 ` Chris Wilson
@ 2013-09-26 22:34 ` Jesse Barnes
2013-09-27 0:49 ` Chris Wilson
0 siblings, 1 reply; 7+ messages in thread
From: Jesse Barnes @ 2013-09-26 22:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Thu, 26 Sep 2013 23:25:46 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Thu, Sep 26, 2013 at 12:33:21PM -0700, Jesse Barnes wrote:
> > We need to use the clock control reg to figure out how many CZ clks are in
> > 30ns and use that as the basis for our RC6 residency calculations.
>
> Hmm, that was confusing. Took a couple of reads to be sure that the
> specs said that the units were always CZ clock cycles.
>
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
> > 2 files changed, 23 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index cf995bb..6f8d0cf 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1797,6 +1797,9 @@
> > */
> > #define HSW_CXT_TOTAL_SIZE (17 * PAGE_SIZE)
> >
> > +#define VLV_CLK_CTL2 0x101104
> > +#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
> > +
> > /*
> > * Overlay regs
> > */
> > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> > index 44f4c1a..9c60515 100644
> > --- a/drivers/gpu/drm/i915/i915_sysfs.c
> > +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> > @@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > u64 raw_time; /* 32b value may overflow during fixed point math */
> > + u64 units = 128ULL, div = 100 000ULL;
>
> The ULL suffix here are superfluous and I notice that you didn't use the
> suffix for the later constants. Be consistent.
>
> Normal units = 128 / (100 * 1000), i.e. each unit is 1.28/1000ms
I can drop the ULL, sure.
>
> >
> > if (!intel_enable_rc6(dev))
> > return 0;
> >
> > - raw_time = I915_READ(reg) * 128ULL;
> > - return DIV_ROUND_UP_ULL(raw_time, 100000);
> > + /* On VLV, residency time is in CZ units rather than 1.28us */
> > + if (IS_VALLEYVIEW(dev)) {
> > + u32 clkctl2;
> > +
> > + clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> > + CLK_CTL2_CZCOUNT_30NS_SHIFT;
> > + if (!clkctl2) {
> > + WARN(!clkctl2, "bogus CZ count value");
> > + return 0;
> > + }
> > + units = DIV_ROUND_UP_ULL(3000ULL, (u64)clkctl2);
>
> For your divisor, this should 30*1000 not 3*1000.
30ns * 100 for fixed point precision, just as above.
>
> > + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> > + units <<= 8;
> > +
> > + div = 100 000 000;
Then here we divide out the ns to ms (1000000) and also the 100 for
fixed point.
Or do I still have it wrong?
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency
2013-09-26 22:34 ` Jesse Barnes
@ 2013-09-27 0:49 ` Chris Wilson
2013-09-27 0:51 ` Jesse Barnes
0 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2013-09-27 0:49 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Thu, Sep 26, 2013 at 03:34:33PM -0700, Jesse Barnes wrote:
> On Thu, 26 Sep 2013 23:25:46 +0100
> Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >
> > >
> > > if (!intel_enable_rc6(dev))
> > > return 0;
> > >
> > > - raw_time = I915_READ(reg) * 128ULL;
> > > - return DIV_ROUND_UP_ULL(raw_time, 100000);
> > > + /* On VLV, residency time is in CZ units rather than 1.28us */
> > > + if (IS_VALLEYVIEW(dev)) {
> > > + u32 clkctl2;
> > > +
> > > + clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> > > + CLK_CTL2_CZCOUNT_30NS_SHIFT;
> > > + if (!clkctl2) {
> > > + WARN(!clkctl2, "bogus CZ count value");
> > > + return 0;
> > > + }
> > > + units = DIV_ROUND_UP_ULL(3000ULL, (u64)clkctl2);
> >
> > For your divisor, this should 30*1000 not 3*1000.
>
> 30ns * 100 for fixed point precision, just as above.
>
> >
> > > + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> > > + units <<= 8;
> > > +
> > > + div = 100 000 000;
>
> Then here we divide out the ns to ms (1000000) and also the 100 for
> fixed point.
>
> Or do I still have it wrong?
Just counting fail on my part, even after splitting it up to make it
easier for myself.
How about
#define BIAS 100
units = 30*BIAS / cltctk2;
if (hi) units <<= 8;
div = NSEC_PER_MSEC * BIAS;
All because I have difficultly counting.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency
2013-09-27 0:49 ` Chris Wilson
@ 2013-09-27 0:51 ` Jesse Barnes
0 siblings, 0 replies; 7+ messages in thread
From: Jesse Barnes @ 2013-09-27 0:51 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Fri, 27 Sep 2013 01:49:37 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Thu, Sep 26, 2013 at 03:34:33PM -0700, Jesse Barnes wrote:
> > On Thu, 26 Sep 2013 23:25:46 +0100
> > Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > >
> > > >
> > > > if (!intel_enable_rc6(dev))
> > > > return 0;
> > > >
> > > > - raw_time = I915_READ(reg) * 128ULL;
> > > > - return DIV_ROUND_UP_ULL(raw_time, 100000);
> > > > + /* On VLV, residency time is in CZ units rather than 1.28us */
> > > > + if (IS_VALLEYVIEW(dev)) {
> > > > + u32 clkctl2;
> > > > +
> > > > + clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> > > > + CLK_CTL2_CZCOUNT_30NS_SHIFT;
> > > > + if (!clkctl2) {
> > > > + WARN(!clkctl2, "bogus CZ count value");
> > > > + return 0;
> > > > + }
> > > > + units = DIV_ROUND_UP_ULL(3000ULL, (u64)clkctl2);
> > >
> > > For your divisor, this should 30*1000 not 3*1000.
> >
> > 30ns * 100 for fixed point precision, just as above.
> >
> > >
> > > > + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> > > > + units <<= 8;
> > > > +
> > > > + div = 100 000 000;
> >
> > Then here we divide out the ns to ms (1000000) and also the 100 for
> > fixed point.
> >
> > Or do I still have it wrong?
>
> Just counting fail on my part, even after splitting it up to make it
> easier for myself.
>
> How about
>
> #define BIAS 100
> units = 30*BIAS / cltctk2;
> if (hi) units <<= 8;
> div = NSEC_PER_MSEC * BIAS;
>
> All because I have difficultly counting.
Sure, will re-post.
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-09-27 0:51 UTC | newest]
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2013-09-26 19:33 [PATCH 1/2] drm/i915/vlv: use lower precision RC6 counter Jesse Barnes
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2013-09-26 22:25 ` Chris Wilson
2013-09-26 22:34 ` Jesse Barnes
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