Re: [PATCH 1/2] drm/i915: Mask the vblank interrupt on bdw by default

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Thu, Nov 07, 2013 at 03:31:52PM +0100, Daniel Vetter wrote:
> Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index bf71e352fd74..1ce5722c2462 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2917,15 +2917,15 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
>  static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_device *dev = dev_priv->dev;
> -	uint32_t de_pipe_enables = GEN8_PIPE_FLIP_DONE |
> -				   GEN8_PIPE_VBLANK |
> -				   GEN8_PIPE_CDCLK_CRC_DONE |
> -				   GEN8_PIPE_FIFO_UNDERRUN |
> -				   GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
> +	uint32_t de_pipe_masked = GEN8_PIPE_FLIP_DONE |
> +		GEN8_PIPE_CDCLK_CRC_DONE |
> +		GEN8_PIPE_FIFO_UNDERRUN |
> +		GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
> +	uint32_t de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK;
>  	int pipe;
> -	dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_enables;
> -	dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_enables;
> -	dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_enables;
> +	dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
> +	dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_masked;
> +	dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_masked;
>  
>  	for_each_pipe(pipe) {
>  		u32 tmp = I915_READ(GEN8_DE_PIPE_IIR(pipe));
> -- 
> 1.8.4.rc3

-- 
Ville Syrjälä
Intel OTC