From: Damien Lespiau <damien.lespiau@intel.com>
To: "Xiang, Haihao" <haihao.xiang@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel gfx][assembler][i-g-t PATCH] assembler/bdw: Update write(...)
Date: Fri, 6 Dec 2013 14:00:25 +0000 [thread overview]
Message-ID: <20131206140025.GG16277@strange.amr.corp.intel.com> (raw)
In-Reply-To: <1386292619-18006-1-git-send-email-haihao.xiang@intel.com>
On Fri, Dec 06, 2013 at 09:16:58AM +0800, Xiang, Haihao wrote:
> From: "Xiang, Haihao" <haihao.xiang@intel.com>
>
> write(...) is used for Render Target Write and Media Block Write.
> The two message types no longer share the same cache agent on GEN8,
> So a parameter is needed for cache agent. The 4th parameter of write()
> is used for write commit bit which has been removed since GEN7. Hence
> we can re-use the 4th parameter as cache agent on GEN8
>
> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Looks good to me, pushed. Thanks for the patch.
--
Damien
> ---
> assembler/gram.y | 30 ++++++++++++++++++++++++++++--
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/assembler/gram.y b/assembler/gram.y
> index bdcfe79..ad4cb29 100644
> --- a/assembler/gram.y
> +++ b/assembler/gram.y
> @@ -1651,7 +1651,20 @@ msgtarget: NULL_TOKEN
> INTEGER RPAREN
> {
> if (IS_GENp(8)) {
> - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + if ($9 != 0 &&
> + $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_RENDER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE &&
> + $9 != GEN7_SFID_DATAPORT_DATA_CACHE &&
> + $9 != HSW_SFID_DATAPORT_DATA_CACHE1) {
> + error (&@9, "error: wrong cache type\n");
> + }
> +
> + if ($9 == 0)
> + gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + else
> + gen8_set_sfid(GEN8(&$$), $9);
> +
> gen8_set_header_present(GEN8(&$$), 1);
> gen8_set_dp_binding_table_index(GEN8(&$$), $3);
> gen8_set_dp_message_control(GEN8(&$$), $5);
> @@ -1701,7 +1714,20 @@ msgtarget: NULL_TOKEN
> INTEGER COMMA INTEGER RPAREN
> {
> if (IS_GENp(8)) {
> - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + if ($9 != 0 &&
> + $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_RENDER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE &&
> + $9 != GEN7_SFID_DATAPORT_DATA_CACHE &&
> + $9 != HSW_SFID_DATAPORT_DATA_CACHE1) {
> + error (&@9, "error: wrong cache type\n");
> + }
> +
> + if ($9 == 0)
> + gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + else
> + gen8_set_sfid(GEN8(&$$), $9);
> +
> gen8_set_header_present(GEN8(&$$), ($11 != 0));
> gen8_set_dp_binding_table_index(GEN8(&$$), $3);
> gen8_set_dp_message_control(GEN8(&$$), $5);
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
prev parent reply other threads:[~2013-12-06 14:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-06 1:16 [Intel gfx][assembler][i-g-t PATCH] assembler/bdw: Update write(...) Xiang, Haihao
2013-12-06 14:00 ` Damien Lespiau [this message]
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