* [Intel gfx][assembler][i-g-t PATCH] assembler/bdw: Update write(...)
@ 2013-12-06 1:16 Xiang, Haihao
2013-12-06 14:00 ` Damien Lespiau
0 siblings, 1 reply; 2+ messages in thread
From: Xiang, Haihao @ 2013-12-06 1:16 UTC (permalink / raw)
To: intel-gfx
From: "Xiang, Haihao" <haihao.xiang@intel.com>
write(...) is used for Render Target Write and Media Block Write.
The two message types no longer share the same cache agent on GEN8,
So a parameter is needed for cache agent. The 4th parameter of write()
is used for write commit bit which has been removed since GEN7. Hence
we can re-use the 4th parameter as cache agent on GEN8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
assembler/gram.y | 30 ++++++++++++++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/assembler/gram.y b/assembler/gram.y
index bdcfe79..ad4cb29 100644
--- a/assembler/gram.y
+++ b/assembler/gram.y
@@ -1651,7 +1651,20 @@ msgtarget: NULL_TOKEN
INTEGER RPAREN
{
if (IS_GENp(8)) {
- gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
+ if ($9 != 0 &&
+ $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE &&
+ $9 != GEN6_SFID_DATAPORT_RENDER_CACHE &&
+ $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE &&
+ $9 != GEN7_SFID_DATAPORT_DATA_CACHE &&
+ $9 != HSW_SFID_DATAPORT_DATA_CACHE1) {
+ error (&@9, "error: wrong cache type\n");
+ }
+
+ if ($9 == 0)
+ gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
+ else
+ gen8_set_sfid(GEN8(&$$), $9);
+
gen8_set_header_present(GEN8(&$$), 1);
gen8_set_dp_binding_table_index(GEN8(&$$), $3);
gen8_set_dp_message_control(GEN8(&$$), $5);
@@ -1701,7 +1714,20 @@ msgtarget: NULL_TOKEN
INTEGER COMMA INTEGER RPAREN
{
if (IS_GENp(8)) {
- gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
+ if ($9 != 0 &&
+ $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE &&
+ $9 != GEN6_SFID_DATAPORT_RENDER_CACHE &&
+ $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE &&
+ $9 != GEN7_SFID_DATAPORT_DATA_CACHE &&
+ $9 != HSW_SFID_DATAPORT_DATA_CACHE1) {
+ error (&@9, "error: wrong cache type\n");
+ }
+
+ if ($9 == 0)
+ gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
+ else
+ gen8_set_sfid(GEN8(&$$), $9);
+
gen8_set_header_present(GEN8(&$$), ($11 != 0));
gen8_set_dp_binding_table_index(GEN8(&$$), $3);
gen8_set_dp_message_control(GEN8(&$$), $5);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Intel gfx][assembler][i-g-t PATCH] assembler/bdw: Update write(...)
2013-12-06 1:16 [Intel gfx][assembler][i-g-t PATCH] assembler/bdw: Update write(...) Xiang, Haihao
@ 2013-12-06 14:00 ` Damien Lespiau
0 siblings, 0 replies; 2+ messages in thread
From: Damien Lespiau @ 2013-12-06 14:00 UTC (permalink / raw)
To: Xiang, Haihao; +Cc: intel-gfx
On Fri, Dec 06, 2013 at 09:16:58AM +0800, Xiang, Haihao wrote:
> From: "Xiang, Haihao" <haihao.xiang@intel.com>
>
> write(...) is used for Render Target Write and Media Block Write.
> The two message types no longer share the same cache agent on GEN8,
> So a parameter is needed for cache agent. The 4th parameter of write()
> is used for write commit bit which has been removed since GEN7. Hence
> we can re-use the 4th parameter as cache agent on GEN8
>
> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Looks good to me, pushed. Thanks for the patch.
--
Damien
> ---
> assembler/gram.y | 30 ++++++++++++++++++++++++++++--
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/assembler/gram.y b/assembler/gram.y
> index bdcfe79..ad4cb29 100644
> --- a/assembler/gram.y
> +++ b/assembler/gram.y
> @@ -1651,7 +1651,20 @@ msgtarget: NULL_TOKEN
> INTEGER RPAREN
> {
> if (IS_GENp(8)) {
> - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + if ($9 != 0 &&
> + $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_RENDER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE &&
> + $9 != GEN7_SFID_DATAPORT_DATA_CACHE &&
> + $9 != HSW_SFID_DATAPORT_DATA_CACHE1) {
> + error (&@9, "error: wrong cache type\n");
> + }
> +
> + if ($9 == 0)
> + gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + else
> + gen8_set_sfid(GEN8(&$$), $9);
> +
> gen8_set_header_present(GEN8(&$$), 1);
> gen8_set_dp_binding_table_index(GEN8(&$$), $3);
> gen8_set_dp_message_control(GEN8(&$$), $5);
> @@ -1701,7 +1714,20 @@ msgtarget: NULL_TOKEN
> INTEGER COMMA INTEGER RPAREN
> {
> if (IS_GENp(8)) {
> - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + if ($9 != 0 &&
> + $9 != GEN6_SFID_DATAPORT_SAMPLER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_RENDER_CACHE &&
> + $9 != GEN6_SFID_DATAPORT_CONSTANT_CACHE &&
> + $9 != GEN7_SFID_DATAPORT_DATA_CACHE &&
> + $9 != HSW_SFID_DATAPORT_DATA_CACHE1) {
> + error (&@9, "error: wrong cache type\n");
> + }
> +
> + if ($9 == 0)
> + gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE);
> + else
> + gen8_set_sfid(GEN8(&$$), $9);
> +
> gen8_set_header_present(GEN8(&$$), ($11 != 0));
> gen8_set_dp_binding_table_index(GEN8(&$$), $3);
> gen8_set_dp_message_control(GEN8(&$$), $5);
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2013-12-06 14:00 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-12-06 1:16 [Intel gfx][assembler][i-g-t PATCH] assembler/bdw: Update write(...) Xiang, Haihao
2013-12-06 14:00 ` Damien Lespiau
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox