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From: Daniel Vetter <daniel@ffwll.ch>
To: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Intel GFX <intel-gfx@lists.freedesktop.org>,
	Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 07/15] drm/i915: gen specific ring init
Date: Tue, 17 Dec 2013 09:52:51 +0100	[thread overview]
Message-ID: <20131217085250.GM9804@phenom.ffwll.local> (raw)
In-Reply-To: <1387255851-24824-8-git-send-email-benjamin.widawsky@intel.com>

On Mon, Dec 16, 2013 at 08:50:43PM -0800, Ben Widawsky wrote:
> Gen8 has already had some differentiation with how it handles rings.
> Semaphores bring yet more differences, and now is as good a time as any
> to do the split.
> 
> Also, since gen8 doesn't actually use semaphores up until this point,
> put the proper "NULL" values in for the mbox info.
> 
> v2: v1 had a stale commit message
> 
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Subject should probably say "gen_8_ specific ring init" since for the
render ring we already have gen specific stuff. I can do this
color-adjustment when applying if nothing else pops up ;-)
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 134 ++++++++++++++++++++++----------
>  1 file changed, 92 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 7a8c5d8..db63a5c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1857,19 +1857,33 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>  	ring->id = RCS;
>  	ring->mmio_base = RENDER_RING_BASE;
>  
> -	if (INTEL_INFO(dev)->gen >= 6) {
> +	if (INTEL_INFO(dev)->gen >= 8) {
> +		ring->add_request = gen6_add_request;
> +		ring->flush = gen8_render_ring_flush;
> +		ring->irq_get = gen8_ring_get_irq;
> +		ring->irq_put = gen8_ring_put_irq;
> +		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
> +		ring->get_seqno = gen6_ring_get_seqno;
> +		ring->set_seqno = ring_set_seqno;
> +		ring->semaphore.sync_to = gen6_ring_sync;
> +		if (i915_semaphore_is_enabled(dev))
> +			ring->semaphore.signal = gen6_signal;
> +		ring->semaphore.signal = gen6_signal;
> +		ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
> +	} else if (INTEL_INFO(dev)->gen >= 6) {
>  		ring->add_request = gen6_add_request;
>  		ring->flush = gen7_render_ring_flush;
>  		if (INTEL_INFO(dev)->gen == 6)
>  			ring->flush = gen6_render_ring_flush;
> -		if (INTEL_INFO(dev)->gen >= 8) {
> -			ring->flush = gen8_render_ring_flush;
> -			ring->irq_get = gen8_ring_get_irq;
> -			ring->irq_put = gen8_ring_put_irq;
> -		} else {
> -			ring->irq_get = gen6_ring_get_irq;
> -			ring->irq_put = gen6_ring_put_irq;
> -		}
> +		ring->irq_get = gen6_ring_get_irq;
> +		ring->irq_put = gen6_ring_put_irq;
>  		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
>  		ring->get_seqno = gen6_ring_get_seqno;
>  		ring->set_seqno = ring_set_seqno;
> @@ -1911,6 +1925,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
>  		ring->irq_enable_mask = I915_USER_INTERRUPT;
>  	}
>  	ring->write_tail = ring_write_tail;
> +
>  	if (IS_HASWELL(dev))
>  		ring->dispatch_execbuffer = hsw_ring_dispatch_execbuffer;
>  	else if (IS_GEN8(dev))
> @@ -2044,24 +2059,35 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>  			ring->irq_put = gen8_ring_put_irq;
>  			ring->dispatch_execbuffer =
>  				gen8_ring_dispatch_execbuffer;
> +			ring->semaphore.sync_to = gen6_ring_sync;
> +			if (i915_semaphore_is_enabled(dev))
> +				ring->semaphore.signal = gen6_signal;
> +			ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
> +			ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
> +			ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
> +			ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
> +			ring->semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
> +			ring->semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
> +			ring->semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
> +			ring->semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
>  		} else {
>  			ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;
>  			ring->irq_get = gen6_ring_get_irq;
>  			ring->irq_put = gen6_ring_put_irq;
>  			ring->dispatch_execbuffer =
>  				gen6_ring_dispatch_execbuffer;
> +			ring->semaphore.sync_to = gen6_ring_sync;
> +			if (i915_semaphore_is_enabled(dev))
> +				ring->semaphore.signal = gen6_signal;
> +			ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_VR;
> +			ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
> +			ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_VB;
> +			ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_VVE;
> +			ring->semaphore.signal_mbox[RCS] = GEN6_RVSYNC;
> +			ring->semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
> +			ring->semaphore.signal_mbox[BCS] = GEN6_BVSYNC;
> +			ring->semaphore.signal_mbox[VECS] = GEN6_VEVSYNC;
>  		}
> -		ring->semaphore.sync_to = gen6_ring_sync;
> -		if (i915_semaphore_is_enabled(dev))
> -			ring->semaphore.signal = gen6_signal;
> -		ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_VR;
> -		ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
> -		ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_VB;
> -		ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_VVE;
> -		ring->semaphore.signal_mbox[RCS] = GEN6_RVSYNC;
> -		ring->semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
> -		ring->semaphore.signal_mbox[BCS] = GEN6_BVSYNC;
> -		ring->semaphore.signal_mbox[VECS] = GEN6_VEVSYNC;
>  	} else {
>  		ring->mmio_base = BSD_RING_BASE;
>  		ring->flush = bsd_ring_flush;
> @@ -2104,23 +2130,35 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
>  		ring->irq_get = gen8_ring_get_irq;
>  		ring->irq_put = gen8_ring_put_irq;
>  		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;
> +		ring->semaphore.sync_to = gen6_ring_sync;
> +		if (i915_semaphore_is_enabled(dev))
> +			ring->semaphore.signal = gen6_signal;
> +		ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
>  	} else {
>  		ring->irq_enable_mask = GT_BLT_USER_INTERRUPT;
>  		ring->irq_get = gen6_ring_get_irq;
>  		ring->irq_put = gen6_ring_put_irq;
>  		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
> +		ring->semaphore.sync_to = gen6_ring_sync;
> +		if (i915_semaphore_is_enabled(dev))
> +			ring->semaphore.signal = gen6_signal;
> +		ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_BR;
> +		ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_BV;
> +		ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_BVE;
> +		ring->semaphore.signal_mbox[RCS] = GEN6_RBSYNC;
> +		ring->semaphore.signal_mbox[VCS] = GEN6_VBSYNC;
> +		ring->semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VECS] = GEN6_VEBSYNC;
>  	}
> -	ring->semaphore.sync_to = gen6_ring_sync;
> -	if (i915_semaphore_is_enabled(dev))
> -		ring->semaphore.signal = gen6_signal;
> -	ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_BR;
> -	ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_BV;
> -	ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
> -	ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_BVE;
> -	ring->semaphore.signal_mbox[RCS] = GEN6_RBSYNC;
> -	ring->semaphore.signal_mbox[VCS] = GEN6_VBSYNC;
> -	ring->semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
> -	ring->semaphore.signal_mbox[VECS] = GEN6_VEBSYNC;
> +
>  	ring->init = init_ring_common;
>  
>  	return intel_init_ring_buffer(dev, ring);
> @@ -2147,23 +2185,35 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
>  		ring->irq_get = gen8_ring_get_irq;
>  		ring->irq_put = gen8_ring_put_irq;
>  		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;
> +		ring->semaphore.sync_to = gen6_ring_sync;
> +		if (i915_semaphore_is_enabled(dev))
> +			ring->semaphore.signal = gen6_signal;
> +		ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
> +		ring->semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
>  	} else {
>  		ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT;
>  		ring->irq_get = hsw_vebox_get_irq;
>  		ring->irq_put = hsw_vebox_put_irq;
> +		ring->semaphore.sync_to = gen6_ring_sync;
> +		if (i915_semaphore_is_enabled(dev))
> +			ring->semaphore.signal = gen6_signal;
> +		ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_VER;
> +		ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_VEV;
> +		ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_VEB;
> +		ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
> +		ring->semaphore.signal_mbox[RCS] = GEN6_RVESYNC;
> +		ring->semaphore.signal_mbox[VCS] = GEN6_VVESYNC;
> +		ring->semaphore.signal_mbox[BCS] = GEN6_BVESYNC;
> +		ring->semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
>  		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
>  	}
> -	ring->semaphore.sync_to = gen6_ring_sync;
> -	if (i915_semaphore_is_enabled(dev))
> -		ring->semaphore.signal = gen6_signal;
> -	ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_VER;
> -	ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_VEV;
> -	ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_VEB;
> -	ring->semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
> -	ring->semaphore.signal_mbox[RCS] = GEN6_RVESYNC;
> -	ring->semaphore.signal_mbox[VCS] = GEN6_VVESYNC;
> -	ring->semaphore.signal_mbox[BCS] = GEN6_BVESYNC;
> -	ring->semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
> +
>  	ring->init = init_ring_common;
>  
>  	return intel_init_ring_buffer(dev, ring);
> -- 
> 1.8.5.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2013-12-17  8:51 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-17  4:50 [PATCH 00/15] [v2] Broadwell HW semaphore Ben Widawsky
2013-12-17  4:50 ` [PATCH 01/15] drm/i915: Reorder/respace MI instruction definition Ben Widawsky
2013-12-17 23:06   ` [PATCH 01.5/15] drm/i915: Make semaphore modparam RO Ben Widawsky
2013-12-17  4:50 ` [PATCH 02/15] drm/i915: Don't emit mbox updates without semaphores Ben Widawsky
2013-12-17 19:24   ` Chris Wilson
2013-12-17 22:02     ` Ben Widawsky
2013-12-17 22:47       ` Chris Wilson
2013-12-17  4:50 ` [PATCH 03/15] drm/i915: Move semaphore specific ring members to struct Ben Widawsky
2013-12-17  4:50 ` [PATCH 04/15] drm/i915: Virtualize the ringbuffer signal func Ben Widawsky
2013-12-17  4:50 ` [PATCH 05/15] drm/i915: Move ring_begin to signal() Ben Widawsky
2013-12-17  4:50 ` [PATCH 06/15] drm/i915: Make semaphore updates more precise Ben Widawsky
2013-12-17  9:49   ` Chris Wilson
2013-12-17  4:50 ` [PATCH 07/15] drm/i915: gen specific ring init Ben Widawsky
2013-12-17  8:52   ` Daniel Vetter [this message]
2013-12-17  4:50 ` [PATCH 08/15] drm/i915/bdw: implement semaphore signal Ben Widawsky
2013-12-17 19:11   ` Chris Wilson
2013-12-17 23:00     ` [PATCH 08/15] [v3] " Ben Widawsky
2013-12-17  4:50 ` [PATCH 09/15] drm/i915/bdw: implement semaphore wait Ben Widawsky
2013-12-17 19:22   ` Chris Wilson
2013-12-17 23:31     ` [PATCH 09/15] [v3] " Ben Widawsky
2013-12-17  4:50 ` [PATCH 10/15] drm/i915: FORCE_RESTORE for gen8 semaphores Ben Widawsky
2013-12-17  4:50 ` [PATCH 11/15] drm/i915/bdw: poll semaphores Ben Widawsky
2013-12-17 19:17   ` Chris Wilson
2013-12-17  4:50 ` [PATCH 12/15] drm/i915: Extract semaphore error collection Ben Widawsky
2013-12-17 19:14   ` Chris Wilson
2013-12-17 23:37     ` Ben Widawsky
2013-12-17  4:50 ` [PATCH 13/15] drm/i915/bdw: collect semaphore error state Ben Widawsky
2013-12-17  4:50 ` [PATCH 14/15] drm/i915: unleash semaphores on gen8 Ben Widawsky
2013-12-17  4:50 ` [PATCH 15/15] drm/i915: semaphore debugfs Ben Widawsky
2013-12-17  9:17 ` [PATCH 00/15] [v2] Broadwell HW semaphore Daniel Vetter
2013-12-17 16:29   ` Damien Lespiau
2013-12-17 18:21     ` Daniel Vetter

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