public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Daniel Vetter <daniel@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH] drm/i915: Fail gpu reset if the forcewake fifo hasn't drained
Date: Fri, 7 Mar 2014 22:35:56 +0100	[thread overview]
Message-ID: <20140307213556.GG25837@phenom.ffwll.local> (raw)
In-Reply-To: <1394222943-7241-1-git-send-email-daniel.vetter@ffwll.ch>

On Fri, Mar 07, 2014 at 09:09:03PM +0100, Daniel Vetter wrote:
> Since the gpu reset + full ppgtt merge we have a hard hang on snb when
> running the gem_reset_stat tests. Recently Mika also some more strict
> forcewake fifo warnigns for gen6/7 in
> 
> commit 20277c60ed08ab4f7237854cc6c2046649f9200f
> Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Date:   Wed Mar 5 18:08:19 2014 +0200
> 
>     drm/i915: Always set fifo count to zero in gen6_reset
> 
> and they _do_ fire just right before the the final failing reset which
> then results in the machine's ultimate demise.
> 
> So use this indicator to fail the gpu reset with an -EIO code,
> preventing further command submission, further hangs and so the deadly
> final gpu reset attempt. It seems to work and my snb survives now.
> 
> The gpu is still dead though unfortunately.
> 
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=74100
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index c666af8232ef..9e22b11d0b0c 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -989,9 +989,11 @@ static int gen6_do_reset(struct drm_device *dev)
>  	if (fw_engine)
>  		dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_engine);
>  
> -	if (IS_GEN6(dev) || IS_GEN7(dev))
> -		WARN_ON((__raw_i915_read32(dev_priv, GTFIFOCTL) &
> -			 GT_FIFO_FREE_ENTRIES_MASK) != 0);
> +	if (IS_GEN6(dev) || IS_GEN7(dev)) {
> +		if (WARN_ON((__raw_i915_read32(dev_priv, GTFIFOCTL) &
> +			     GT_FIFO_FREE_ENTRIES_MASK) != 0))
> +		    ret = -EIO;

Chris pointed out that this WARN doesn't make much sense, and testing
confirmed that this completely breaks gpu reset on my machines here.

I've backed out Mika's original patch, this seems to be the wrong path.
-Daniel

> +	}
>  
>  	dev_priv->uncore.fifo_count = 0;
>  
> -- 
> 1.8.1.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-03-07 21:36 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-07 20:09 [PATCH] drm/i915: Fail gpu reset if the forcewake fifo hasn't drained Daniel Vetter
2014-03-07 21:35 ` Daniel Vetter [this message]
2014-03-08 18:50   ` Ben Widawsky
2014-03-08 19:58     ` Daniel Vetter
2014-03-08 20:02       ` Ben Widawsky

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20140307213556.GG25837@phenom.ffwll.local \
    --to=daniel@ffwll.ch \
    --cc=daniel.vetter@ffwll.ch \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=mika.kuoppala@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox