[PATCH 00/12] Broadwell 3.14 backports

[PATCH 00/12] Broadwell 3.14 backports

[Ben Widawsky]

The following patches are the backported "simple" fixes for 3.14. Some
of these already had Cc: stable on them, but required conflict
resolution which I've provided (presumably they canbe dropped if it's
easier for upstream). There will be another series of backports which
has fixes that require more than a single patch.

I will not have a machine to test these on until Monday, but I am
mailing them out now in case our QA can get it tested sooner.

Ben Widawsky (2):
  drm/i915/bdw: Use scratch page table for GEN8 PPGTT
  drm/i915/bdw: Restore PPAT on thaw

Damien Lespiau (1):
  drm/i915/bdw: The TLB invalidation mechanism has been removed from
    INSTPM

Jani Nikula (1):
  drm/i915: don't flood the logs about bdw semaphores

Kenneth Graunke (2):
  drm/i915: Add a partial instruction shootdown workaround on Broadwell.
  drm/i915: Add thread stall DOP clock gating workaround on Broadwell.

Mika Kuoppala (2):
  drm/i915: Fix forcewake counts for gen8
  drm/i915: Do forcewake reset on gen8

Ville Syrjälä (4):
  drm/i915: Disable semaphore wait event idle message on BDW
  drm/i915: Implement WaDisableSDEUnitClockGating:bdw
  drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
  drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW

 drivers/gpu/drm/i915/i915_drv.c         |  5 ++++-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |  7 +++++++
 drivers/gpu/drm/i915/i915_reg.h         | 10 ++++++++++
 drivers/gpu/drm/i915/intel_pm.c         | 18 ++++++++++++++++--
 drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++++++++---
 drivers/gpu/drm/i915/intel_uncore.c     | 29 +++++++++++++++--------------
 6 files changed, 61 insertions(+), 20 deletions(-)

-- 
1.9.1

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[PATCH 01/12] drm/i915: Fix forcewake counts for gen8

[Ben Widawsky]

From: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Sometimes generic driver code gets forcewake explicitly by
gen6_gt_force_wake_get(), which check forcewake_count before accessing
hardware. However the register access with gen8_write function access
low level hw accessors directly, ignoring the forcewake_count. This
leads to nested forcewake get from hardware, in ring init and possibly
elsewhere, causing forcewake ack clear errors and/or hangs.

Fix this by checking the forcewake count also in gen8_write

v2: Read side doesn't care about shadowed registers,
    Remove __needs_put funkiness from gen8_write. (Ville)
    Improved commit message.

References: https://bugs.freedesktop.org/show_bug.cgi?id=74007
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_uncore.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 87df68f..6df5ec4 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -634,16 +634,17 @@ static bool is_gen8_shadowed(struct drm_i915_private *dev_priv, u32 reg)
 #define __gen8_write(x) \
 static void \
 gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
-	bool __needs_put = reg < 0x40000 && !is_gen8_shadowed(dev_priv, reg); \
 	REG_WRITE_HEADER; \
-	if (__needs_put) { \
-		dev_priv->uncore.funcs.force_wake_get(dev_priv, \
-							FORCEWAKE_ALL); \
-	} \
-	__raw_i915_write##x(dev_priv, reg, val); \
-	if (__needs_put) { \
-		dev_priv->uncore.funcs.force_wake_put(dev_priv, \
-							FORCEWAKE_ALL); \
+	if (reg < 0x40000 && !is_gen8_shadowed(dev_priv, reg)) { \
+		if (dev_priv->uncore.forcewake_count == 0) \
+			dev_priv->uncore.funcs.force_wake_get(dev_priv,	\
+							      FORCEWAKE_ALL); \
+		__raw_i915_write##x(dev_priv, reg, val); \
+		if (dev_priv->uncore.forcewake_count == 0) \
+			dev_priv->uncore.funcs.force_wake_put(dev_priv, \
+							      FORCEWAKE_ALL); \
+	} else { \
+		__raw_i915_write##x(dev_priv, reg, val); \
 	} \
 	REG_WRITE_FOOTER; \
 }
-- 
1.9.1

[PATCH 02/12] drm/i915: Do forcewake reset on gen8

[Ben Widawsky]

From: Mika Kuoppala <mika.kuoppala@intel.com>

When we get control from BIOS there might be mt forcewake
bits already set. This causes us to do double mt get
without proper clear/ack sequence.

Fix this by clearing mt forcewake register on init,
like we do with older gens.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_uncore.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 6df5ec4..5f1762b 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -305,13 +305,13 @@ static void intel_uncore_forcewake_reset(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (IS_VALLEYVIEW(dev)) {
+	if (IS_VALLEYVIEW(dev))
 		vlv_force_wake_reset(dev_priv);
-	} else if (INTEL_INFO(dev)->gen >= 6) {
+	else if (IS_GEN6(dev) || IS_GEN7(dev))
 		__gen6_gt_force_wake_reset(dev_priv);
-		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
-			__gen6_gt_force_wake_mt_reset(dev_priv);
-	}
+
+	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev) || IS_GEN8(dev))
+		__gen6_gt_force_wake_mt_reset(dev_priv);
 }
 
 void intel_uncore_early_sanitize(struct drm_device *dev)
-- 
1.9.1

[PATCH 03/12] drm/i915: Disable semaphore wait event idle message on BDW

[Ben Widawsky]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

According to BSpec we need to always set this magic bit in ring buffer
mode.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a48b7ca..1240250 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -941,6 +941,9 @@
 #define   GEN6_BLITTER_LOCK_SHIFT			16
 #define   GEN6_BLITTER_FBC_NOTIFY			(1<<3)
 
+#define GEN6_RC_SLEEP_PSMI_CONTROL	0x2050
+#define   GEN8_RC_SEMA_IDLE_MSG_DISABLE	(1 << 12)
+
 #define GEN6_BSD_SLEEP_PSMI_CONTROL	0x12050
 #define   GEN6_BSD_SLEEP_MSG_DISABLE	(1 << 0)
 #define   GEN6_BSD_SLEEP_FLUSH_DISABLE	(1 << 2)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e1fc35a..7b79c18 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4755,6 +4755,9 @@ static void gen8_init_clock_gating(struct drm_device *dev)
 	I915_WRITE(GEN7_FF_THREAD_MODE,
 		   I915_READ(GEN7_FF_THREAD_MODE) &
 		   ~(GEN8_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME));
+
+	I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
+		   _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE));
 }
 
 static void haswell_init_clock_gating(struct drm_device *dev)
-- 
1.9.1

[PATCH 04/12] drm/i915: Implement WaDisableSDEUnitClockGating:bdw

[Ben Widawsky]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1240250..db70031 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4868,6 +4868,9 @@
 #define GEN7_UCGCTL4				0x940c
 #define  GEN7_L3BANK2X_CLOCK_GATE_DISABLE	(1<<25)
 
+#define GEN8_UCGCTL6				0x9430
+#define   GEN8_SDEUNIT_CLOCK_GATE_DISABLE	(1<<14)
+
 #define GEN6_RPNSWREQ				0xA008
 #define   GEN6_TURBO_DISABLE			(1<<31)
 #define   GEN6_FREQUENCY(x)			((x)<<25)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7b79c18..a0c6add 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4758,6 +4758,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
 
 	I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
 		   _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE));
+
+	/* WaDisableSDEUnitClockGating:bdw */
+	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
+		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 }
 
 static void haswell_init_clock_gating(struct drm_device *dev)
-- 
1.9.1

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[PATCH 05/12] drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw

[Ben Widawsky]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 31b36c5..2ac8f94 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -569,7 +569,7 @@ static int init_render_ring(struct intel_ring_buffer *ring)
 	 * to use MI_WAIT_FOR_EVENT within the CS. It should already be
 	 * programmed to '1' on all products.
 	 *
-	 * WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv
+	 * WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv,bdw
 	 */
 	if (INTEL_INFO(dev)->gen >= 6)
 		I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));
-- 
1.9.1

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[PATCH 06/12] drm/i915: Add a partial instruction shootdown workaround on Broadwell.

[Ben Widawsky]

From: Kenneth Graunke <kenneth@whitecape.org>

I believe this will be necessary on production hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Fix whitespace fail spotted by checkpatch. Also add missing
:bdw w/a tag that Ville spotted.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index db70031..cb9ff13 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5012,6 +5012,9 @@
 #define   GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE	(1<<10)
 #define   GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE	(1<<3)
 
+#define GEN8_ROW_CHICKEN		0xe4f0
+#define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
+
 #define GEN7_ROW_CHICKEN2		0xe4f4
 #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
 #define   DOP_CLOCK_GATING_DISABLE	(1<<0)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a0c6add..a7e5669 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4713,6 +4713,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
 
 	WARN(!i915_preliminary_hw_support,
 	     "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production\n");
+	/* WaDisablePartialInstShootdown:bdw */
+	I915_WRITE(GEN8_ROW_CHICKEN,
+		   _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
+
 	I915_WRITE(HALF_SLICE_CHICKEN3,
 		   _MASKED_BIT_ENABLE(GEN8_CENTROID_PIXEL_OPT_DIS));
 	I915_WRITE(HALF_SLICE_CHICKEN3,
-- 
1.9.1

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[PATCH 07/12] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.

[Ben Widawsky]

From: Kenneth Graunke <kenneth@whitecape.org>

Ben and I believe this will be necessary on production hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
[danvet: Shuffle lines to group all ROW_CHICKEN writes and add a
cautious comment that this might not be needed on production hw.]
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cb9ff13..d9b2292 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5014,6 +5014,7 @@
 
 #define GEN8_ROW_CHICKEN		0xe4f0
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
+#define   STALL_DOP_GATING_DISABLE		(1<<5)
 
 #define GEN7_ROW_CHICKEN2		0xe4f4
 #define GEN7_ROW_CHICKEN2_GT2		0xf4f4
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a7e5669..2b82a6b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4713,9 +4713,12 @@ static void gen8_init_clock_gating(struct drm_device *dev)
 
 	WARN(!i915_preliminary_hw_support,
 	     "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production\n");
+
 	/* WaDisablePartialInstShootdown:bdw */
+	/* WaDisableThreadStallDopClockGating:bdw */
 	I915_WRITE(GEN8_ROW_CHICKEN,
-		   _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
+		   _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE |
+				      STALL_DOP_GATING_DISABLE));
 
 	I915_WRITE(HALF_SLICE_CHICKEN3,
 		   _MASKED_BIT_ENABLE(GEN8_CENTROID_PIXEL_OPT_DIS));
-- 
1.9.1

[PATCH 08/12] drm/i915/bdw: The TLB invalidation mechanism has been removed from INSTPM

[Ben Widawsky]

From: Damien Lespiau <damien.lespiau@intel.com>

While wandering in the spec, I noticed that BDW removes those 2 bits
from INSTPM. I couldn't find any direct way to invalidate the TLB (ie
without the ring working already). Maybe someone will be more lucky.

At least, we now know we may be a problem.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2ac8f94..c1ee5ef 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -977,8 +977,14 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
 	I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
 	POSTING_READ(mmio);
 
-	/* Flush the TLB for this page */
-	if (INTEL_INFO(dev)->gen >= 6) {
+	/*
+	 * Flush the TLB for this page
+	 *
+	 * FIXME: These two bits have disappeared on gen8, so a question
+	 * arises: do we still need this and if so how should we go about
+	 * invalidating the TLB?
+	 */
+	if (INTEL_INFO(dev)->gen >= 6 && INTEL_INFO(dev)->gen < 8) {
 		u32 reg = RING_INSTPM(ring->mmio_base);
 		I915_WRITE(reg,
 			   _MASKED_BIT_ENABLE(INSTPM_TLB_INVALIDATE |
-- 
1.9.1

[PATCH 09/12] drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW

[Ben Widawsky]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Misplaced parens cause us to totally clobber the CHICKEN_PIPESL_1
registers with 0xffffffff. Move the parens to the correct place
to avoid this.

In particular this caused bit 30 of said registers to be set, which
caused the sprite CSC to produce incorrect results.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72220
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
---
 drivers/gpu/drm/i915/intel_pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2b82a6b..f9a63b7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4745,8 +4745,8 @@ static void gen8_init_clock_gating(struct drm_device *dev)
 	/* WaPsrDPRSUnmaskVBlankInSRD:bdw */
 	for_each_pipe(i) {
 		I915_WRITE(CHICKEN_PIPESL_1(i),
-			   I915_READ(CHICKEN_PIPESL_1(i) |
-				     DPRS_MASK_VBLANK_SRD));
+			   I915_READ(CHICKEN_PIPESL_1(i)) |
+			   DPRS_MASK_VBLANK_SRD);
 	}
 
 	/* Use Force Non-Coherent whenever executing a 3D context. This is a
-- 
1.9.1

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[PATCH 10/12] drm/i915: don't flood the logs about bdw semaphores

[Ben Widawsky]

From: Jani Nikula <jani.nikula@intel.com>

BDW is no longer flagged as preliminary hw, but without
i915.preliminary_hw_support module param set the logs are filled with
WARNs about it.

Just make semaphores off the BDW per-chip default for now.

CC: Ben Widawsky <ben@bwidawsk.net>
Reported-by: Sebastien Dufour <sebastien.dufour@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/i915_drv.c
---
 drivers/gpu/drm/i915/i915_drv.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ec7bb0f..8b5c305 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -477,13 +477,16 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
 
 	/* Until we get further testing... */
 	if (IS_GEN8(dev)) {
-		WARN_ON(!i915_preliminary_hw_support);
 		return false;
 	}
 
 	if (i915_semaphores >= 0)
 		return i915_semaphores;
 
+	/* Until we get further testing... */
+	if (IS_GEN8(dev))
+		return false;
+
 #ifdef CONFIG_INTEL_IOMMU
 	/* Enable semaphores on SNB when IO remapping is off */
 	if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
-- 
1.9.1

[PATCH 11/12] drm/i915/bdw: Use scratch page table for GEN8 PPGTT

[Ben Widawsky]

From: Ben Widawsky <benjamin.widawsky@intel.com>

I'm not clear if the hardware is still subject to the same prefetching
issues that made us use a scratch page in the first place. In either
case, we're using garbage with the current code (we will end up using
offset 0).

This may be the cause of our current gem_cpu_reloc regression with
PPGTT. I cannot test it at the moment.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 40a2b36..8cc9398 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -359,6 +359,7 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
  **/
 static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size)
 {
+	struct drm_i915_private *dev_priv = ppgtt->base.dev->dev_private;
 	struct page *pt_pages;
 	int i, j, ret = -ENOMEM;
 	const int max_pdp = DIV_ROUND_UP(size, 1 << 30);
@@ -389,6 +390,7 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size)
 	ppgtt->base.clear_range = gen8_ppgtt_clear_range;
 	ppgtt->base.insert_entries = gen8_ppgtt_insert_entries;
 	ppgtt->base.cleanup = gen8_ppgtt_cleanup;
+	ppgtt->base.scratch = dev_priv->gtt.base.scratch;
 	ppgtt->base.start = 0;
 	ppgtt->base.total = ppgtt->num_pt_pages * GEN8_PTES_PER_PAGE * PAGE_SIZE;
 
-- 
1.9.1

[PATCH 12/12] drm/i915/bdw: Restore PPAT on thaw

[Ben Widawsky]

From: Ben Widawsky <benjamin.widawsky@intel.com>

Apparently it is wiped out from under us, and we get some really fun
caching artifacts upon resume (it seems to be WB for all types by
default).

Reported-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: James Ausmus <james.ausmus@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76113
Tested-by: Timo Aaltonen <timo.aaltonen@canonical.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/i915_gem_gtt.c
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 8cc9398..268e0d3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -28,6 +28,8 @@
 #include "i915_trace.h"
 #include "intel_drv.h"
 
+static void gen8_setup_private_ppat(struct drm_i915_private *dev_priv);
+
 #define GEN6_PPGTT_PD_ENTRIES 512
 #define I915_PPGTT_PT_ENTRIES (PAGE_SIZE / sizeof(gen6_gtt_pte_t))
 typedef uint64_t gen8_gtt_pte_t;
@@ -865,6 +867,9 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
 		i915_gem_gtt_bind_object(obj, obj->cache_level);
 	}
 
+	if (INTEL_INFO(dev)->gen >= 8)
+		gen8_setup_private_ppat(dev_priv);
+
 	i915_gem_chipset_flush(dev);
 }
 
-- 
1.9.1

Re: [PATCH 00/12] Broadwell 3.14 backports

[Daniel Vetter]

On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
<benjamin.widawsky@linux.intel.com> wrote:
> The following patches are the backported "simple" fixes for 3.14. Some
> of these already had Cc: stable on them, but required conflict
> resolution which I've provided (presumably they canbe dropped if it's
> easier for upstream). There will be another series of backports which
> has fixes that require more than a single patch.
>
> I will not have a machine to test these on until Monday, but I am
> mailing them out now in case our QA can get it tested sooner.
>
> Ben Widawsky (2):
>   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
>   drm/i915/bdw: Restore PPAT on thaw
>
> Damien Lespiau (1):
>   drm/i915/bdw: The TLB invalidation mechanism has been removed from
>     INSTPM
>
> Jani Nikula (1):
>   drm/i915: don't flood the logs about bdw semaphores
>
> Kenneth Graunke (2):
>   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
>   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
>
> Mika Kuoppala (2):
>   drm/i915: Fix forcewake counts for gen8
>   drm/i915: Do forcewake reset on gen8
>
> Ville Syrjälä (4):
>   drm/i915: Disable semaphore wait event idle message on BDW
>   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
>   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
>   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW

The stable team requires a reference to the sha1 of the upstream
commit, which your patches seem to lack. git cherry-pick -x
automatically adds that for you.

Also please don't send out backports to stable if we still want to do
some testing on them. Adding Greg and stable so he knows that he can
bin this series for now. Of course all the patches in here which
already have cc: stable in upstream should still go through the normal
process (presuming they don't conflict ofc). But since most of these
patches are from drm-intel-next we must wait anyway until drm-next has
been merged into Linus' tree.

Thanks, Daniel

>
>  drivers/gpu/drm/i915/i915_drv.c         |  5 ++++-
>  drivers/gpu/drm/i915/i915_gem_gtt.c     |  7 +++++++
>  drivers/gpu/drm/i915/i915_reg.h         | 10 ++++++++++
>  drivers/gpu/drm/i915/intel_pm.c         | 18 ++++++++++++++++--
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++++++++---
>  drivers/gpu/drm/i915/intel_uncore.c     | 29 +++++++++++++++--------------
>  6 files changed, 61 insertions(+), 20 deletions(-)




-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH 10/12] [v2] drm/i915: don't flood the logs about bdw semaphores

[Ben Widawsky]

From: Jani Nikula <jani.nikula@intel.com>

BDW is no longer flagged as preliminary hw, but without
i915.preliminary_hw_support module param set the logs are filled with
WARNs about it.

Just make semaphores off the BDW per-chip default for now.

v2: Spurious merge hunk leftover in v1 removed

CC: Ben Widawsky <ben@bwidawsk.net>
Reported-by: Sebastien Dufour <sebastien.dufour@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[BDW 3.14 backport]
Cc: stable@vger.kernel.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Conflicts:
	drivers/gpu/drm/i915/i915_drv.c
---
 drivers/gpu/drm/i915/i915_drv.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ec7bb0f..8f16e11 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -476,10 +476,8 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
 		return false;
 
 	/* Until we get further testing... */
-	if (IS_GEN8(dev)) {
-		WARN_ON(!i915_preliminary_hw_support);
+	if (IS_GEN8(dev))
 		return false;
-	}
 
 	if (i915_semaphores >= 0)
 		return i915_semaphores;
-- 
1.9.1

Re: [PATCH 00/12] Broadwell 3.14 backports

[Ben Widawsky]

On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
> On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
> <benjamin.widawsky@linux.intel.com> wrote:
> > The following patches are the backported "simple" fixes for 3.14. Some
> > of these already had Cc: stable on them, but required conflict
> > resolution which I've provided (presumably they canbe dropped if it's
> > easier for upstream). There will be another series of backports which
> > has fixes that require more than a single patch.
> >
> > I will not have a machine to test these on until Monday, but I am
> > mailing them out now in case our QA can get it tested sooner.
> >
> > Ben Widawsky (2):
> >   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
> >   drm/i915/bdw: Restore PPAT on thaw
> >
> > Damien Lespiau (1):
> >   drm/i915/bdw: The TLB invalidation mechanism has been removed from
> >     INSTPM
> >
> > Jani Nikula (1):
> >   drm/i915: don't flood the logs about bdw semaphores
> >
> > Kenneth Graunke (2):
> >   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
> >   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
> >
> > Mika Kuoppala (2):
> >   drm/i915: Fix forcewake counts for gen8
> >   drm/i915: Do forcewake reset on gen8
> >
> > Ville Syrjälä (4):
> >   drm/i915: Disable semaphore wait event idle message on BDW
> >   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
> >   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
> >   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
> 
> The stable team requires a reference to the sha1 of the upstream
> commit, which your patches seem to lack. git cherry-pick -x
> automatically adds that for you.

I decided not to do this because in the git help it says,
"This is done only for cherry picks without conflicts." I believe only
one of these patches didn't actually have a conflict (so I should have
done it for that). So I will assume I should ignore this recommendation
from the git help. I didn't want to make it seem like these patches did
not have conflicts.

> 
> Also please don't send out backports to stable if we still want to do
> some testing on them. Adding Greg and stable so he knows that he can
> bin this series for now. Of course all the patches in here which
> already have cc: stable in upstream should still go through the normal
> process (presuming they don't conflict ofc). But since most of these
> patches are from drm-intel-next we must wait anyway until drm-next has
> been merged into Linus' tree.
> 

Since you added Greg, I am curious - as noted in the cover letter, I've
done the merge conflict resolution on the patches which already had Cc:
stable. I didn't intentionally include any patches which already had Cc:
stable and didn't require conflict resolution. Are those
interesting/useful, should I drop them from the series?

> Thanks, Daniel
> 
> >
> >  drivers/gpu/drm/i915/i915_drv.c         |  5 ++++-
> >  drivers/gpu/drm/i915/i915_gem_gtt.c     |  7 +++++++
> >  drivers/gpu/drm/i915/i915_reg.h         | 10 ++++++++++
> >  drivers/gpu/drm/i915/intel_pm.c         | 18 ++++++++++++++++--
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++++++++---
> >  drivers/gpu/drm/i915/intel_uncore.c     | 29 +++++++++++++++--------------
> >  6 files changed, 61 insertions(+), 20 deletions(-)
> 
> 
> 
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

-- 
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 00/12] Broadwell 3.14 backports

[Greg KH]

On Fri, Mar 21, 2014 at 03:14:48PM -0700, Ben Widawsky wrote:
> On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
> > On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
> > <benjamin.widawsky@linux.intel.com> wrote:
> > > The following patches are the backported "simple" fixes for 3.14. Some
> > > of these already had Cc: stable on them, but required conflict
> > > resolution which I've provided (presumably they canbe dropped if it's
> > > easier for upstream). There will be another series of backports which
> > > has fixes that require more than a single patch.
> > >
> > > I will not have a machine to test these on until Monday, but I am
> > > mailing them out now in case our QA can get it tested sooner.
> > >
> > > Ben Widawsky (2):
> > >   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
> > >   drm/i915/bdw: Restore PPAT on thaw
> > >
> > > Damien Lespiau (1):
> > >   drm/i915/bdw: The TLB invalidation mechanism has been removed from
> > >     INSTPM
> > >
> > > Jani Nikula (1):
> > >   drm/i915: don't flood the logs about bdw semaphores
> > >
> > > Kenneth Graunke (2):
> > >   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
> > >   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
> > >
> > > Mika Kuoppala (2):
> > >   drm/i915: Fix forcewake counts for gen8
> > >   drm/i915: Do forcewake reset on gen8
> > >
> > > Ville Syrjälä (4):
> > >   drm/i915: Disable semaphore wait event idle message on BDW
> > >   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
> > >   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
> > >   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
> > 
> > The stable team requires a reference to the sha1 of the upstream
> > commit, which your patches seem to lack. git cherry-pick -x
> > automatically adds that for you.
> 
> I decided not to do this because in the git help it says,
> "This is done only for cherry picks without conflicts." I believe only
> one of these patches didn't actually have a conflict (so I should have
> done it for that). So I will assume I should ignore this recommendation
> from the git help. I didn't want to make it seem like these patches did
> not have conflicts.
> 
> > 
> > Also please don't send out backports to stable if we still want to do
> > some testing on them. Adding Greg and stable so he knows that he can
> > bin this series for now. Of course all the patches in here which
> > already have cc: stable in upstream should still go through the normal
> > process (presuming they don't conflict ofc). But since most of these
> > patches are from drm-intel-next we must wait anyway until drm-next has
> > been merged into Linus' tree.
> > 
> 
> Since you added Greg, I am curious - as noted in the cover letter, I've
> done the merge conflict resolution on the patches which already had Cc:
> stable. I didn't intentionally include any patches which already had Cc:
> stable and didn't require conflict resolution. Are those
> interesting/useful, should I drop them from the series?

I have no idea what is going on here, what this original email was from
/ about, or what I am supposed to do here...

The stable patch process is pretty well defined, and documented, is that
lacking somehow, and if so, in what?

greg k-h

Re: [PATCH 00/12] Broadwell 3.14 backports

[Ben Widawsky]

On Fri, Mar 21, 2014 at 04:47:05PM -0700, Greg KH wrote:
> On Fri, Mar 21, 2014 at 03:14:48PM -0700, Ben Widawsky wrote:
> > On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
> > > On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
> > > <benjamin.widawsky@linux.intel.com> wrote:
> > > > The following patches are the backported "simple" fixes for 3.14. Some
> > > > of these already had Cc: stable on them, but required conflict
> > > > resolution which I've provided (presumably they canbe dropped if it's
> > > > easier for upstream). There will be another series of backports which
> > > > has fixes that require more than a single patch.
> > > >
> > > > I will not have a machine to test these on until Monday, but I am
> > > > mailing them out now in case our QA can get it tested sooner.
> > > >
> > > > Ben Widawsky (2):
> > > >   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
> > > >   drm/i915/bdw: Restore PPAT on thaw
> > > >
> > > > Damien Lespiau (1):
> > > >   drm/i915/bdw: The TLB invalidation mechanism has been removed from
> > > >     INSTPM
> > > >
> > > > Jani Nikula (1):
> > > >   drm/i915: don't flood the logs about bdw semaphores
> > > >
> > > > Kenneth Graunke (2):
> > > >   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
> > > >   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
> > > >
> > > > Mika Kuoppala (2):
> > > >   drm/i915: Fix forcewake counts for gen8
> > > >   drm/i915: Do forcewake reset on gen8
> > > >
> > > > Ville Syrjälä (4):
> > > >   drm/i915: Disable semaphore wait event idle message on BDW
> > > >   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
> > > >   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
> > > >   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
> > > 
> > > The stable team requires a reference to the sha1 of the upstream
> > > commit, which your patches seem to lack. git cherry-pick -x
> > > automatically adds that for you.
> > 
> > I decided not to do this because in the git help it says,
> > "This is done only for cherry picks without conflicts." I believe only
> > one of these patches didn't actually have a conflict (so I should have
> > done it for that). So I will assume I should ignore this recommendation
> > from the git help. I didn't want to make it seem like these patches did
> > not have conflicts.
> > 
> > > 
> > > Also please don't send out backports to stable if we still want to do
> > > some testing on them. Adding Greg and stable so he knows that he can
> > > bin this series for now. Of course all the patches in here which
> > > already have cc: stable in upstream should still go through the normal
> > > process (presuming they don't conflict ofc). But since most of these
> > > patches are from drm-intel-next we must wait anyway until drm-next has
> > > been merged into Linus' tree.
> > > 
> > 
> > Since you added Greg, I am curious - as noted in the cover letter, I've
> > done the merge conflict resolution on the patches which already had Cc:
> > stable. I didn't intentionally include any patches which already had Cc:
> > stable and didn't require conflict resolution. Are those
> > interesting/useful, should I drop them from the series?
> 
> I have no idea what is going on here, what this original email was from
> / about, or what I am supposed to do here...
> 
> The stable patch process is pretty well defined, and documented, is that
> lacking somehow, and if so, in what?
> 
> greg k-h

My apologies, I didn't understand what Daniel had originally wanted from
me, and I think the plan changed a bit in flight. I'm sorry you got
dragged into it. The stable process documentation is perfectly adequate.

-- 
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 00/12] Broadwell 3.14 backports

[Ben Widawsky]

On Fri, Mar 21, 2014 at 05:06:06PM -0700, Ben Widawsky wrote:
> On Fri, Mar 21, 2014 at 04:47:05PM -0700, Greg KH wrote:
> > On Fri, Mar 21, 2014 at 03:14:48PM -0700, Ben Widawsky wrote:
> > > On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
> > > > On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
> > > > <benjamin.widawsky@linux.intel.com> wrote:
> > > > > The following patches are the backported "simple" fixes for 3.14. Some
> > > > > of these already had Cc: stable on them, but required conflict
> > > > > resolution which I've provided (presumably they canbe dropped if it's
> > > > > easier for upstream). There will be another series of backports which
> > > > > has fixes that require more than a single patch.
> > > > >
> > > > > I will not have a machine to test these on until Monday, but I am
> > > > > mailing them out now in case our QA can get it tested sooner.
> > > > >
> > > > > Ben Widawsky (2):
> > > > >   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
> > > > >   drm/i915/bdw: Restore PPAT on thaw
> > > > >
> > > > > Damien Lespiau (1):
> > > > >   drm/i915/bdw: The TLB invalidation mechanism has been removed from
> > > > >     INSTPM
> > > > >
> > > > > Jani Nikula (1):
> > > > >   drm/i915: don't flood the logs about bdw semaphores
> > > > >
> > > > > Kenneth Graunke (2):
> > > > >   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
> > > > >   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
> > > > >
> > > > > Mika Kuoppala (2):
> > > > >   drm/i915: Fix forcewake counts for gen8
> > > > >   drm/i915: Do forcewake reset on gen8
> > > > >
> > > > > Ville Syrjälä (4):
> > > > >   drm/i915: Disable semaphore wait event idle message on BDW
> > > > >   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
> > > > >   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
> > > > >   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
> > > > 
> > > > The stable team requires a reference to the sha1 of the upstream
> > > > commit, which your patches seem to lack. git cherry-pick -x
> > > > automatically adds that for you.
> > > 
> > > I decided not to do this because in the git help it says,
> > > "This is done only for cherry picks without conflicts." I believe only
> > > one of these patches didn't actually have a conflict (so I should have
> > > done it for that). So I will assume I should ignore this recommendation
> > > from the git help. I didn't want to make it seem like these patches did
> > > not have conflicts.
> > > 
> > > > 
> > > > Also please don't send out backports to stable if we still want to do
> > > > some testing on them. Adding Greg and stable so he knows that he can
> > > > bin this series for now. Of course all the patches in here which
> > > > already have cc: stable in upstream should still go through the normal
> > > > process (presuming they don't conflict ofc). But since most of these
> > > > patches are from drm-intel-next we must wait anyway until drm-next has
> > > > been merged into Linus' tree.
> > > > 
> > > 
> > > Since you added Greg, I am curious - as noted in the cover letter, I've
> > > done the merge conflict resolution on the patches which already had Cc:
> > > stable. I didn't intentionally include any patches which already had Cc:
> > > stable and didn't require conflict resolution. Are those
> > > interesting/useful, should I drop them from the series?
> > 
> > I have no idea what is going on here, what this original email was from
> > / about, or what I am supposed to do here...
> > 
> > The stable patch process is pretty well defined, and documented, is that
> > lacking somehow, and if so, in what?
> > 
> > greg k-h
> 
> My apologies, I didn't understand what Daniel had originally wanted from
> me, and I think the plan changed a bit in flight. I'm sorry you got
> dragged into it. The stable process documentation is perfectly adequate.
> 

And if it wasn't clear, like Daniel said, please ignore these 12 patches
for now. Sorry again.

-- 
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 00/12] Broadwell 3.14 backports

[Ben Widawsky]

Let's try this again. I've pushed a branch here:
http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=bdw-backports

I need to re-review some of the merge conflicts for 4g GGTT, which I
will try to do before Monday.

Daniel: please make sure this is what you had in mind. I don't know
where you want Cc: stable tags.

James: please test this as soon as possible.

Thanks.


On Fri, Mar 21, 2014 at 11:48:09AM -0700, Ben Widawsky wrote:
> The following patches are the backported "simple" fixes for 3.14. Some
> of these already had Cc: stable on them, but required conflict
> resolution which I've provided (presumably they canbe dropped if it's
> easier for upstream). There will be another series of backports which
> has fixes that require more than a single patch.
> 
> I will not have a machine to test these on until Monday, but I am
> mailing them out now in case our QA can get it tested sooner.
> 
> Ben Widawsky (2):
>   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
>   drm/i915/bdw: Restore PPAT on thaw
> 
> Damien Lespiau (1):
>   drm/i915/bdw: The TLB invalidation mechanism has been removed from
>     INSTPM
> 
> Jani Nikula (1):
>   drm/i915: don't flood the logs about bdw semaphores
> 
> Kenneth Graunke (2):
>   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
>   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
> 
> Mika Kuoppala (2):
>   drm/i915: Fix forcewake counts for gen8
>   drm/i915: Do forcewake reset on gen8
> 
> Ville Syrjälä (4):
>   drm/i915: Disable semaphore wait event idle message on BDW
>   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
>   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
>   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
> 
>  drivers/gpu/drm/i915/i915_drv.c         |  5 ++++-
>  drivers/gpu/drm/i915/i915_gem_gtt.c     |  7 +++++++
>  drivers/gpu/drm/i915/i915_reg.h         | 10 ++++++++++
>  drivers/gpu/drm/i915/intel_pm.c         | 18 ++++++++++++++++--
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++++++++---
>  drivers/gpu/drm/i915/intel_uncore.c     | 29 +++++++++++++++--------------
>  6 files changed, 61 insertions(+), 20 deletions(-)
> 
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 00/12] Broadwell 3.14 backports

[Daniel Vetter]

On Fri, Mar 21, 2014 at 05:17:34PM -0700, Ben Widawsky wrote:
> On Fri, Mar 21, 2014 at 05:06:06PM -0700, Ben Widawsky wrote:
> > On Fri, Mar 21, 2014 at 04:47:05PM -0700, Greg KH wrote:
> > > I have no idea what is going on here, what this original email was from
> > > / about, or what I am supposed to do here...
> > > 
> > > The stable patch process is pretty well defined, and documented, is that
> > > lacking somehow, and if so, in what?
> > > 
> > > greg k-h
> > 
> > My apologies, I didn't understand what Daniel had originally wanted from
> > me, and I think the plan changed a bit in flight. I'm sorry you got
> > dragged into it. The stable process documentation is perfectly adequate.
> > 
> 
> And if it wasn't clear, like Daniel said, please ignore these 12 patches
> for now. Sorry again.

For clarification: BDW support was enabled for the first time in 3.14, but
in the -rc phase suddenly lots of workaround patches and little fixes
start to pile in. Since pretty much no one has the hardware already I
decided to withold all bdw fixes and queued them for -next. Once it all
stabilized we could then reevaluate whether bdw support in 3.14 makes
sense or not, i.e. whether to backport a pile of fixes or just disable it
again.

bdw seems to have calmed down now and it doesn't look too bad (it's a bit
more than these 12 patches here, but all fairly isolated), so I've asked
Ben to assemble the required patches, backport and test them and then
submit it all to stable (once drm-next has landed, ofc). Ben was a bit
overeager and submitted them to stable a bit too early ;-)

My apologies for the fuzz and my unclear communication.

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Re: [PATCH 00/12] Broadwell 3.14 backports

[Daniel Vetter]

On Fri, Mar 21, 2014 at 05:51:01PM -0700, Ben Widawsky wrote:
> Let's try this again. I've pushed a branch here:
> http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=bdw-backports
> 
> I need to re-review some of the merge conflicts for 4g GGTT, which I
> will try to do before Monday.
> 
> Daniel: please make sure this is what you had in mind. I don't know
> where you want Cc: stable tags.

We don't need cc: stable, we just need to submit it (since it has the
upstream sha1s already, which is the requirement for stable patches). Cc:
stable is only for when you want it to get backport anyway. Otherwise
looks good. I dunno whether git cherry-pick can be told to use the sha1
reference layout Greg prefers or not, he uses "This is <sha1> in
upstream." between the commit header and the actual commit message. But
ime his scripts reformat your commit messages anyway.

> James: please test this as soon as possible.

Once this is tested and we conclude it's sufficient to get bdw going on
3.14 without hilarity I think we should do a quick review on intel-gfx to
check that the impact outside of bdw is indeed minimal. Then once drm-next
has landed with all the referenced commits we can submit it to Greg with a
small cover letter why we want this and that plan B would be to kill bdw
in 3.14.

Thanks for doing this,
Daniel

> 
> Thanks.
> 
> 
> On Fri, Mar 21, 2014 at 11:48:09AM -0700, Ben Widawsky wrote:
> > The following patches are the backported "simple" fixes for 3.14. Some
> > of these already had Cc: stable on them, but required conflict
> > resolution which I've provided (presumably they canbe dropped if it's
> > easier for upstream). There will be another series of backports which
> > has fixes that require more than a single patch.
> > 
> > I will not have a machine to test these on until Monday, but I am
> > mailing them out now in case our QA can get it tested sooner.
> > 
> > Ben Widawsky (2):
> >   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
> >   drm/i915/bdw: Restore PPAT on thaw
> > 
> > Damien Lespiau (1):
> >   drm/i915/bdw: The TLB invalidation mechanism has been removed from
> >     INSTPM
> > 
> > Jani Nikula (1):
> >   drm/i915: don't flood the logs about bdw semaphores
> > 
> > Kenneth Graunke (2):
> >   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
> >   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
> > 
> > Mika Kuoppala (2):
> >   drm/i915: Fix forcewake counts for gen8
> >   drm/i915: Do forcewake reset on gen8
> > 
> > Ville Syrjälä (4):
> >   drm/i915: Disable semaphore wait event idle message on BDW
> >   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
> >   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
> >   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
> > 
> >  drivers/gpu/drm/i915/i915_drv.c         |  5 ++++-
> >  drivers/gpu/drm/i915/i915_gem_gtt.c     |  7 +++++++
> >  drivers/gpu/drm/i915/i915_reg.h         | 10 ++++++++++
> >  drivers/gpu/drm/i915/intel_pm.c         | 18 ++++++++++++++++--
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++++++++---
> >  drivers/gpu/drm/i915/intel_uncore.c     | 29 +++++++++++++++--------------
> >  6 files changed, 61 insertions(+), 20 deletions(-)
> > 
> > -- 
> > 1.9.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ben Widawsky, Intel Open Source Technology Center

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Re: [PATCH 00/12] Broadwell 3.14 backports

[Ausmus, James]

On Sat, Mar 22, 2014 at 4:34 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Fri, Mar 21, 2014 at 05:51:01PM -0700, Ben Widawsky wrote:
>> Let's try this again. I've pushed a branch here:
>> http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=bdw-backports
>>
>> I need to re-review some of the merge conflicts for 4g GGTT, which I
>> will try to do before Monday.
>>
>> Daniel: please make sure this is what you had in mind. I don't know
>> where you want Cc: stable tags.
>
> We don't need cc: stable, we just need to submit it (since it has the
> upstream sha1s already, which is the requirement for stable patches). Cc:
> stable is only for when you want it to get backport anyway. Otherwise
> looks good. I dunno whether git cherry-pick can be told to use the sha1
> reference layout Greg prefers or not, he uses "This is <sha1> in
> upstream." between the commit header and the actual commit message. But
> ime his scripts reformat your commit messages anyway.
>
>> James: please test this as soon as possible.
>
> Once this is tested and we conclude it's sufficient to get bdw going on
> 3.14 without hilarity I think we should do a quick review on intel-gfx to
> check that the impact outside of bdw is indeed minimal. Then once drm-next
> has landed with all the referenced commits we can submit it to Greg with a
> small cover letter why we want this and that plan B would be to kill bdw
> in 3.14.

This seems to be working well for me, with the one caveat that on boot
and once per resume I'm hitting the WARN(!i915_preliminary_hw_support,
"GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production") code in
gen8_init_clock_gating - can that WARN be dropped via "drm/i915: Don't
use i915_preliminary_hw_support to mean pre-production" ?

Both with and without that patch added, the series is:

Tested-by: James Ausmus <james.ausmus@intel.com>


>
> Thanks for doing this,
> Daniel
>
>>
>> Thanks.
>>
>>
>> On Fri, Mar 21, 2014 at 11:48:09AM -0700, Ben Widawsky wrote:
>> > The following patches are the backported "simple" fixes for 3.14. Some
>> > of these already had Cc: stable on them, but required conflict
>> > resolution which I've provided (presumably they canbe dropped if it's
>> > easier for upstream). There will be another series of backports which
>> > has fixes that require more than a single patch.
>> >
>> > I will not have a machine to test these on until Monday, but I am
>> > mailing them out now in case our QA can get it tested sooner.
>> >
>> > Ben Widawsky (2):
>> >   drm/i915/bdw: Use scratch page table for GEN8 PPGTT
>> >   drm/i915/bdw: Restore PPAT on thaw
>> >
>> > Damien Lespiau (1):
>> >   drm/i915/bdw: The TLB invalidation mechanism has been removed from
>> >     INSTPM
>> >
>> > Jani Nikula (1):
>> >   drm/i915: don't flood the logs about bdw semaphores
>> >
>> > Kenneth Graunke (2):
>> >   drm/i915: Add a partial instruction shootdown workaround on Broadwell.
>> >   drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
>> >
>> > Mika Kuoppala (2):
>> >   drm/i915: Fix forcewake counts for gen8
>> >   drm/i915: Do forcewake reset on gen8
>> >
>> > Ville Syrjälä (4):
>> >   drm/i915: Disable semaphore wait event idle message on BDW
>> >   drm/i915: Implement WaDisableSDEUnitClockGating:bdw
>> >   drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
>> >   drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
>> >
>> >  drivers/gpu/drm/i915/i915_drv.c         |  5 ++++-
>> >  drivers/gpu/drm/i915/i915_gem_gtt.c     |  7 +++++++
>> >  drivers/gpu/drm/i915/i915_reg.h         | 10 ++++++++++
>> >  drivers/gpu/drm/i915/intel_pm.c         | 18 ++++++++++++++++--
>> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++++++++---
>> >  drivers/gpu/drm/i915/intel_uncore.c     | 29 +++++++++++++++--------------
>> >  6 files changed, 61 insertions(+), 20 deletions(-)
>> >
>> > --
>> > 1.9.1
>> >
>> > _______________________________________________
>> > Intel-gfx mailing list
>> > Intel-gfx@lists.freedesktop.org
>> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>> --
>> Ben Widawsky, Intel Open Source Technology Center
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch



-- 


James Ausmus
Sr. Software Engineer
SSG-OTC ChromeOS Integration

Re: [PATCH 00/12] Broadwell 3.14 backports

[Ben Widawsky]

On Mon, Mar 24, 2014 at 04:14:32PM -0700, Ausmus, James wrote:
> On Sat, Mar 22, 2014 at 4:34 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Fri, Mar 21, 2014 at 05:51:01PM -0700, Ben Widawsky wrote:
> >> Let's try this again. I've pushed a branch here:
> >> http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=bdw-backports
> >>
> >> I need to re-review some of the merge conflicts for 4g GGTT, which I
> >> will try to do before Monday.
> >>
> >> Daniel: please make sure this is what you had in mind. I don't know
> >> where you want Cc: stable tags.
> >
> > We don't need cc: stable, we just need to submit it (since it has the
> > upstream sha1s already, which is the requirement for stable patches). Cc:
> > stable is only for when you want it to get backport anyway. Otherwise
> > looks good. I dunno whether git cherry-pick can be told to use the sha1
> > reference layout Greg prefers or not, he uses "This is <sha1> in
> > upstream." between the commit header and the actual commit message. But
> > ime his scripts reformat your commit messages anyway.
> >
> >> James: please test this as soon as possible.
> >
> > Once this is tested and we conclude it's sufficient to get bdw going on
> > 3.14 without hilarity I think we should do a quick review on intel-gfx to
> > check that the impact outside of bdw is indeed minimal. Then once drm-next
> > has landed with all the referenced commits we can submit it to Greg with a
> > small cover letter why we want this and that plan B would be to kill bdw
> > in 3.14.
> 
> This seems to be working well for me, with the one caveat that on boot
> and once per resume I'm hitting the WARN(!i915_preliminary_hw_support,
> "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production") code in
> gen8_init_clock_gating - can that WARN be dropped via "drm/i915: Don't
> use i915_preliminary_hw_support to mean pre-production" ?
> 
> Both with and without that patch added, the series is:
> 
> Tested-by: James Ausmus <james.ausmus@intel.com>

Thanks.

Daniel, the patch is added to my backports branch. I think given that
that it removes a WARN which we know to be bogus, it's a good patch for
stable. But it's your call.

[snip]


-- 
Ben Widawsky, Intel Open Source Technology Center

Re: [PATCH 00/12] Broadwell 3.14 backports

[Daniel Vetter]

On Mon, Mar 24, 2014 at 04:17:42PM -0700, Ben Widawsky wrote:
> On Mon, Mar 24, 2014 at 04:14:32PM -0700, Ausmus, James wrote:
> > On Sat, Mar 22, 2014 at 4:34 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> > > On Fri, Mar 21, 2014 at 05:51:01PM -0700, Ben Widawsky wrote:
> > >> Let's try this again. I've pushed a branch here:
> > >> http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=bdw-backports
> > >>
> > >> I need to re-review some of the merge conflicts for 4g GGTT, which I
> > >> will try to do before Monday.
> > >>
> > >> Daniel: please make sure this is what you had in mind. I don't know
> > >> where you want Cc: stable tags.
> > >
> > > We don't need cc: stable, we just need to submit it (since it has the
> > > upstream sha1s already, which is the requirement for stable patches). Cc:
> > > stable is only for when you want it to get backport anyway. Otherwise
> > > looks good. I dunno whether git cherry-pick can be told to use the sha1
> > > reference layout Greg prefers or not, he uses "This is <sha1> in
> > > upstream." between the commit header and the actual commit message. But
> > > ime his scripts reformat your commit messages anyway.
> > >
> > >> James: please test this as soon as possible.
> > >
> > > Once this is tested and we conclude it's sufficient to get bdw going on
> > > 3.14 without hilarity I think we should do a quick review on intel-gfx to
> > > check that the impact outside of bdw is indeed minimal. Then once drm-next
> > > has landed with all the referenced commits we can submit it to Greg with a
> > > small cover letter why we want this and that plan B would be to kill bdw
> > > in 3.14.
> > 
> > This seems to be working well for me, with the one caveat that on boot
> > and once per resume I'm hitting the WARN(!i915_preliminary_hw_support,
> > "GEN8_CENTROID_PIXEL_OPT_DIS not be needed for production") code in
> > gen8_init_clock_gating - can that WARN be dropped via "drm/i915: Don't
> > use i915_preliminary_hw_support to mean pre-production" ?
> > 
> > Both with and without that patch added, the series is:
> > 
> > Tested-by: James Ausmus <james.ausmus@intel.com>
> 
> Thanks.
> 
> Daniel, the patch is added to my backports branch. I think given that
> that it removes a WARN which we know to be bogus, it's a good patch for
> stable. But it's your call.

Oh, that patch definitely should go to stable if we fix up bdw in 3.14 ;-)
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch