* [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
@ 2014-03-26 18:41 Damien Lespiau
2014-03-26 19:08 ` Ben Widawsky
0 siblings, 1 reply; 6+ messages in thread
From: Damien Lespiau @ 2014-03-26 18:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
Not implementing this W/A can lead to hangs.
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Rafael Barbalho <rafael.barbalho@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 3 ++-
drivers/gpu/drm/i915/intel_pm.c | 4 ++++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0ebc20d..927a7c1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1060,7 +1060,8 @@ enum punit_power_well {
#define CACHE_MODE_0_GEN7 0x7000 /* IVB+ */
#define HIZ_RAW_STALL_OPT_DISABLE (1<<2)
#define CACHE_MODE_1 0x7004 /* IVB+ */
-#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
+#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
+#define GEN8_4x4_STC_OPTIMIZATION_DISABLE (1<<6)
#define GEN6_BLITTER_ECOSKPD 0x221d0
#define GEN6_BLITTER_LOCK_SHIFT 16
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c1e2d75..b66a43b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4882,6 +4882,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
/* WaDisableSDEUnitClockGating:bdw */
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
+
+ /* Wa4x4STCOptimizationDisable:bdw */
+ I915_WRITE(CACHE_MODE_1,
+ _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
}
static void haswell_init_clock_gating(struct drm_device *dev)
--
1.8.3.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
2014-03-26 18:41 [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw Damien Lespiau
@ 2014-03-26 19:08 ` Ben Widawsky
2014-03-26 19:10 ` Ben Widawsky
0 siblings, 1 reply; 6+ messages in thread
From: Ben Widawsky @ 2014-03-26 19:08 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Wed, Mar 26, 2014 at 06:41:51PM +0000, Damien Lespiau wrote:
> Not implementing this W/A can lead to hangs.
>
> Cc: Ben Widawsky <benjamin.widawsky@intel.com>
> Cc: Rafael Barbalho <rafael.barbalho@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
From reading the HSD, it's not a workaround. It was a spec bug. I
presume the workaround name came from the workaround database? If it did
not, I'd just drop any mention of "workaround." If it's in the
workaround database, maybe just leave it so we can check later.
Either way:
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 ++-
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0ebc20d..927a7c1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1060,7 +1060,8 @@ enum punit_power_well {
> #define CACHE_MODE_0_GEN7 0x7000 /* IVB+ */
> #define HIZ_RAW_STALL_OPT_DISABLE (1<<2)
> #define CACHE_MODE_1 0x7004 /* IVB+ */
> -#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
> +#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
> +#define GEN8_4x4_STC_OPTIMIZATION_DISABLE (1<<6)
>
> #define GEN6_BLITTER_ECOSKPD 0x221d0
> #define GEN6_BLITTER_LOCK_SHIFT 16
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c1e2d75..b66a43b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4882,6 +4882,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> /* WaDisableSDEUnitClockGating:bdw */
> I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +
> + /* Wa4x4STCOptimizationDisable:bdw */
> + I915_WRITE(CACHE_MODE_1,
> + _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
> }
>
> static void haswell_init_clock_gating(struct drm_device *dev)
> --
> 1.8.3.1
>
--
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
2014-03-26 19:08 ` Ben Widawsky
@ 2014-03-26 19:10 ` Ben Widawsky
2014-03-26 21:39 ` Daniel Vetter
0 siblings, 1 reply; 6+ messages in thread
From: Ben Widawsky @ 2014-03-26 19:10 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On Wed, Mar 26, 2014 at 12:08:44PM -0700, Ben Widawsky wrote:
> On Wed, Mar 26, 2014 at 06:41:51PM +0000, Damien Lespiau wrote:
> > Not implementing this W/A can lead to hangs.
> >
> > Cc: Ben Widawsky <benjamin.widawsky@intel.com>
> > Cc: Rafael Barbalho <rafael.barbalho@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
>
> From reading the HSD, it's not a workaround. It was a spec bug. I
> presume the workaround name came from the workaround database? If it did
> not, I'd just drop any mention of "workaround." If it's in the
> workaround database, maybe just leave it so we can check later.
>
> Either way:
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Oh, and I think CC: stable
>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 3 ++-
> > drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> > 2 files changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 0ebc20d..927a7c1 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1060,7 +1060,8 @@ enum punit_power_well {
> > #define CACHE_MODE_0_GEN7 0x7000 /* IVB+ */
> > #define HIZ_RAW_STALL_OPT_DISABLE (1<<2)
> > #define CACHE_MODE_1 0x7004 /* IVB+ */
> > -#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
> > +#define PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
> > +#define GEN8_4x4_STC_OPTIMIZATION_DISABLE (1<<6)
> >
> > #define GEN6_BLITTER_ECOSKPD 0x221d0
> > #define GEN6_BLITTER_LOCK_SHIFT 16
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index c1e2d75..b66a43b 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4882,6 +4882,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> > /* WaDisableSDEUnitClockGating:bdw */
> > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> > GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> > +
> > + /* Wa4x4STCOptimizationDisable:bdw */
> > + I915_WRITE(CACHE_MODE_1,
> > + _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
> > }
> >
> > static void haswell_init_clock_gating(struct drm_device *dev)
> > --
> > 1.8.3.1
> >
>
> --
> Ben Widawsky, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
2014-03-26 19:10 ` Ben Widawsky
@ 2014-03-26 21:39 ` Daniel Vetter
2014-03-26 22:37 ` Ben Widawsky
0 siblings, 1 reply; 6+ messages in thread
From: Daniel Vetter @ 2014-03-26 21:39 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx, Ben Widawsky
On Wed, Mar 26, 2014 at 12:10:41PM -0700, Ben Widawsky wrote:
> On Wed, Mar 26, 2014 at 12:08:44PM -0700, Ben Widawsky wrote:
> > On Wed, Mar 26, 2014 at 06:41:51PM +0000, Damien Lespiau wrote:
> > > Not implementing this W/A can lead to hangs.
> > >
> > > Cc: Ben Widawsky <benjamin.widawsky@intel.com>
> > > Cc: Rafael Barbalho <rafael.barbalho@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> >
> > From reading the HSD, it's not a workaround. It was a spec bug. I
> > presume the workaround name came from the workaround database? If it did
> > not, I'd just drop any mention of "workaround." If it's in the
> > workaround database, maybe just leave it so we can check later.
> >
> > Either way:
> > Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
>
> Oh, and I think CC: stable
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
2014-03-26 21:39 ` Daniel Vetter
@ 2014-03-26 22:37 ` Ben Widawsky
2014-03-26 22:45 ` Daniel Vetter
0 siblings, 1 reply; 6+ messages in thread
From: Ben Widawsky @ 2014-03-26 22:37 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx, Ben Widawsky
On Wed, Mar 26, 2014 at 10:39:21PM +0100, Daniel Vetter wrote:
> On Wed, Mar 26, 2014 at 12:10:41PM -0700, Ben Widawsky wrote:
> > On Wed, Mar 26, 2014 at 12:08:44PM -0700, Ben Widawsky wrote:
> > > On Wed, Mar 26, 2014 at 06:41:51PM +0000, Damien Lespiau wrote:
> > > > Not implementing this W/A can lead to hangs.
> > > >
> > > > Cc: Ben Widawsky <benjamin.widawsky@intel.com>
> > > > Cc: Rafael Barbalho <rafael.barbalho@intel.com>
> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> > >
> > > From reading the HSD, it's not a workaround. It was a spec bug. I
> > > presume the workaround name came from the workaround database? If it did
> > > not, I'd just drop any mention of "workaround." If it's in the
> > > workaround database, maybe just leave it so we can check later.
> > >
> > > Either way:
> > > Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
> >
> > Oh, and I think CC: stable
>
> Queued for -next, thanks for the patch.
> -Daniel
You want/need this in bdw-backports?
--
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
2014-03-26 22:37 ` Ben Widawsky
@ 2014-03-26 22:45 ` Daniel Vetter
0 siblings, 0 replies; 6+ messages in thread
From: Daniel Vetter @ 2014-03-26 22:45 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx, Ben Widawsky
On Wed, Mar 26, 2014 at 11:37 PM, Ben Widawsky <ben@bwidawsk.net> wrote:
> On Wed, Mar 26, 2014 at 10:39:21PM +0100, Daniel Vetter wrote:
>> On Wed, Mar 26, 2014 at 12:10:41PM -0700, Ben Widawsky wrote:
>> > On Wed, Mar 26, 2014 at 12:08:44PM -0700, Ben Widawsky wrote:
>> > > On Wed, Mar 26, 2014 at 06:41:51PM +0000, Damien Lespiau wrote:
>> > > > Not implementing this W/A can lead to hangs.
>> > > >
>> > > > Cc: Ben Widawsky <benjamin.widawsky@intel.com>
>> > > > Cc: Rafael Barbalho <rafael.barbalho@intel.com>
>> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > > > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
>> > >
>> > > From reading the HSD, it's not a workaround. It was a spec bug. I
>> > > presume the workaround name came from the workaround database? If it did
>> > > not, I'd just drop any mention of "workaround." If it's in the
>> > > workaround database, maybe just leave it so we can check later.
>> > >
>> > > Either way:
>> > > Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
>> >
>> > Oh, and I think CC: stable
>>
>> Queued for -next, thanks for the patch.
>> -Daniel
>
> You want/need this in bdw-backports?
Should take the normal stable backport path, so no need for special
handling. Well, if it doesn't conflict, I didn't check that ;-)
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 6+ messages in thread
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2014-03-26 18:41 [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw Damien Lespiau
2014-03-26 19:08 ` Ben Widawsky
2014-03-26 19:10 ` Ben Widawsky
2014-03-26 21:39 ` Daniel Vetter
2014-03-26 22:37 ` Ben Widawsky
2014-03-26 22:45 ` Daniel Vetter
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