* [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable
@ 2014-05-12 22:37 Jesse Barnes
2014-05-13 6:08 ` Daniel Vetter
0 siblings, 1 reply; 4+ messages in thread
From: Jesse Barnes @ 2014-05-12 22:37 UTC (permalink / raw)
To: intel-gfx
Like on ILK, the pipe won't be running until later on.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c65e7f7..c66d2ea 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4344,7 +4344,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc);
- intel_wait_for_vblank(dev_priv->dev, pipe);
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable
2014-05-12 22:37 [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable Jesse Barnes
@ 2014-05-13 6:08 ` Daniel Vetter
2014-05-13 14:57 ` Jesse Barnes
0 siblings, 1 reply; 4+ messages in thread
From: Daniel Vetter @ 2014-05-13 6:08 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Like on ILK, the pipe won't be running until later on.
Like on ilk?! Since when is vlv display derived from that? "[PATCH
3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms"
from Ville makes a more consistent impression to me. Also, and
Bugzilla: tags for this one?
-Daniel
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/intel_display.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c65e7f7..c66d2ea 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4344,7 +4344,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
>
> intel_update_watermarks(crtc);
> intel_enable_pipe(intel_crtc);
> - intel_wait_for_vblank(dev_priv->dev, pipe);
> intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
>
> intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable
2014-05-13 6:08 ` Daniel Vetter
@ 2014-05-13 14:57 ` Jesse Barnes
2014-05-13 15:14 ` Daniel Vetter
0 siblings, 1 reply; 4+ messages in thread
From: Jesse Barnes @ 2014-05-13 14:57 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Tue, 13 May 2014 08:08:55 +0200
Daniel Vetter <daniel@ffwll.ch> wrote:
> On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > Like on ILK, the pipe won't be running until later on.
>
> Like on ilk?! Since when is vlv display derived from that? "[PATCH
> 3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms"
> from Ville makes a more consistent impression to me. Also, and
Yeah that's fine too. But of course BYT isn't just i915 legacy; it
also includes some IBX logic on the port side. So you can't just lump
it in with i9xx all the time unfortuantely. Either way it looks like
Ville's patch will fix this too.
> Bugzilla: tags for this one?
Meh, this particular one only addresses an internal bug, and it looks
like Ville didn't include a bz link either... did you add it when you
committed?
https://bugs.freedesktop.org/show_bug.cgi?id=77297 looks like the closest.
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable
2014-05-13 14:57 ` Jesse Barnes
@ 2014-05-13 15:14 ` Daniel Vetter
0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2014-05-13 15:14 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Tue, May 13, 2014 at 07:57:57AM -0700, Jesse Barnes wrote:
> On Tue, 13 May 2014 08:08:55 +0200
> Daniel Vetter <daniel@ffwll.ch> wrote:
>
> > On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > > Like on ILK, the pipe won't be running until later on.
> >
> > Like on ilk?! Since when is vlv display derived from that? "[PATCH
> > 3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms"
> > from Ville makes a more consistent impression to me. Also, and
>
> Yeah that's fine too. But of course BYT isn't just i915 legacy; it
> also includes some IBX logic on the port side. So you can't just lump
> it in with i9xx all the time unfortuantely. Either way it looks like
> Ville's patch will fix this too.
Hm, I've thought the dp/hdmi ports are from g4x and the pll stuff from the
cedarview ... it's a frankenstein for sure ;-)
> > Bugzilla: tags for this one?
>
> Meh, this particular one only addresses an internal bug, and it looks
> like Ville didn't include a bz link either... did you add it when you
> committed?
>
> https://bugs.freedesktop.org/show_bug.cgi?id=77297 looks like the closest.
Yeah, looks like a match, I'll add it. Although the bug also refers to
pch-split platforms ... I'll ask for retesting overall.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 4+ messages in thread
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2014-05-12 22:37 [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable Jesse Barnes
2014-05-13 6:08 ` Daniel Vetter
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2014-05-13 15:14 ` Daniel Vetter
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