* [PATCH] drm/i915: remove duplicate register defines
@ 2014-08-01 19:19 Paulo Zanoni
2014-08-04 8:48 ` Daniel Vetter
0 siblings, 1 reply; 5+ messages in thread
From: Paulo Zanoni @ 2014-08-01 19:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
cat i915_reg.h | sort | uniq -d | grep define
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 28e21ed..c45b679 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3755,7 +3755,6 @@ enum punit_power_well {
#define PIPE_VSYNC_INTERRUPT_STATUS (1UL<<9)
#define PIPE_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
#define PIPE_DPST_EVENT_STATUS (1UL<<7)
-#define PIPE_LEGACY_BLC_EVENT_STATUS (1UL<<6)
#define PIPE_A_PSR_STATUS_VLV (1UL<<6)
#define PIPE_LEGACY_BLC_EVENT_STATUS (1UL<<6)
#define PIPE_ODD_FIELD_INTERRUPT_STATUS (1UL<<5)
@@ -5430,7 +5429,6 @@ enum punit_power_well {
#define VLV_GTLC_ALLOWWAKEERR (1 << 1)
#define VLV_GTLC_PW_MEDIA_STATUS_MASK (1 << 5)
#define VLV_GTLC_PW_RENDER_STATUS_MASK (1 << 7)
-#define VLV_GTLC_SURVIVABILITY_REG 0x130098
#define FORCEWAKE_MT 0xa188 /* multi-threaded */
#define FORCEWAKE_KERNEL 0x1
#define FORCEWAKE_USER 0x2
--
2.0.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] drm/i915: remove duplicate register defines
2014-08-01 19:19 [PATCH] drm/i915: remove duplicate register defines Paulo Zanoni
@ 2014-08-04 8:48 ` Daniel Vetter
0 siblings, 0 replies; 5+ messages in thread
From: Daniel Vetter @ 2014-08-04 8:48 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx, Paulo Zanoni
On Fri, Aug 01, 2014 at 04:19:54PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> cat i915_reg.h | sort | uniq -d | grep define
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 28e21ed..c45b679 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3755,7 +3755,6 @@ enum punit_power_well {
> #define PIPE_VSYNC_INTERRUPT_STATUS (1UL<<9)
> #define PIPE_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
> #define PIPE_DPST_EVENT_STATUS (1UL<<7)
> -#define PIPE_LEGACY_BLC_EVENT_STATUS (1UL<<6)
> #define PIPE_A_PSR_STATUS_VLV (1UL<<6)
> #define PIPE_LEGACY_BLC_EVENT_STATUS (1UL<<6)
> #define PIPE_ODD_FIELD_INTERRUPT_STATUS (1UL<<5)
> @@ -5430,7 +5429,6 @@ enum punit_power_well {
> #define VLV_GTLC_ALLOWWAKEERR (1 << 1)
> #define VLV_GTLC_PW_MEDIA_STATUS_MASK (1 << 5)
> #define VLV_GTLC_PW_RENDER_STATUS_MASK (1 << 7)
> -#define VLV_GTLC_SURVIVABILITY_REG 0x130098
> #define FORCEWAKE_MT 0xa188 /* multi-threaded */
> #define FORCEWAKE_KERNEL 0x1
> #define FORCEWAKE_USER 0x2
> --
> 2.0.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] drm/i915: remove duplicate register #defines
@ 2012-11-21 14:55 Daniel Vetter
2012-11-21 16:26 ` Paulo Zanoni
0 siblings, 1 reply; 5+ messages in thread
From: Daniel Vetter @ 2012-11-21 14:55 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
Somehow a chunk of unused register defines ended up in the middle of
the PLL defines. They go back to the original kms merging.
The only used #define is SR01, move it to the register name together
with the other legacy vga stuff.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_reg.h | 18 +-----------------
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9118bd1..5cd5308 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -142,6 +142,7 @@
#define VGA_MSR_CGA_MODE (1<<0)
#define VGA_SR_INDEX 0x3c4
+#define SR01 1
#define VGA_SR_DATA 0x3c5
#define VGA_AR_INDEX 0x3c0
@@ -938,23 +939,6 @@
#define DPLL_LOCK_VLV (1<<15)
#define DPLL_INTEGRATED_CLOCK_VLV (1<<13)
-#define SRX_INDEX 0x3c4
-#define SRX_DATA 0x3c5
-#define SR01 1
-#define SR01_SCREEN_OFF (1<<5)
-
-#define PPCR 0x61204
-#define PPCR_ON (1<<0)
-
-#define DVOB 0x61140
-#define DVOB_ON (1<<31)
-#define DVOC 0x61160
-#define DVOC_ON (1<<31)
-#define LVDS 0x61180
-#define LVDS_ON (1<<31)
-
-/* Scratch pad debug 0 reg:
- */
#define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
/*
* The i830 generation, in LVDS mode, defines P1 as the bit number set within
--
1.7.11.7
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: remove duplicate register #defines
2012-11-21 14:55 [PATCH] drm/i915: remove duplicate register #defines Daniel Vetter
@ 2012-11-21 16:26 ` Paulo Zanoni
2012-11-26 18:46 ` Daniel Vetter
0 siblings, 1 reply; 5+ messages in thread
From: Paulo Zanoni @ 2012-11-21 16:26 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development
2012/11/21 Daniel Vetter <daniel.vetter@ffwll.ch>:
> Somehow a chunk of unused register defines ended up in the middle of
> the PLL defines. They go back to the original kms merging.
>
> The only used #define is SR01, move it to the register name together
> with the other legacy vga stuff.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Well, it compiles...
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 18 +-----------------
> 1 file changed, 1 insertion(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9118bd1..5cd5308 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -142,6 +142,7 @@
> #define VGA_MSR_CGA_MODE (1<<0)
>
> #define VGA_SR_INDEX 0x3c4
> +#define SR01 1
> #define VGA_SR_DATA 0x3c5
>
> #define VGA_AR_INDEX 0x3c0
> @@ -938,23 +939,6 @@
> #define DPLL_LOCK_VLV (1<<15)
> #define DPLL_INTEGRATED_CLOCK_VLV (1<<13)
>
> -#define SRX_INDEX 0x3c4
> -#define SRX_DATA 0x3c5
> -#define SR01 1
> -#define SR01_SCREEN_OFF (1<<5)
> -
> -#define PPCR 0x61204
> -#define PPCR_ON (1<<0)
> -
> -#define DVOB 0x61140
> -#define DVOB_ON (1<<31)
> -#define DVOC 0x61160
> -#define DVOC_ON (1<<31)
> -#define LVDS 0x61180
> -#define LVDS_ON (1<<31)
> -
> -/* Scratch pad debug 0 reg:
> - */
> #define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
> /*
> * The i830 generation, in LVDS mode, defines P1 as the bit number set within
> --
> 1.7.11.7
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: remove duplicate register #defines
2012-11-21 16:26 ` Paulo Zanoni
@ 2012-11-26 18:46 ` Daniel Vetter
0 siblings, 0 replies; 5+ messages in thread
From: Daniel Vetter @ 2012-11-26 18:46 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: Daniel Vetter, Intel Graphics Development
On Wed, Nov 21, 2012 at 02:26:57PM -0200, Paulo Zanoni wrote:
> 2012/11/21 Daniel Vetter <daniel.vetter@ffwll.ch>:
> > Somehow a chunk of unused register defines ended up in the middle of
> > the PLL defines. They go back to the original kms merging.
> >
> > The only used #define is SR01, move it to the register name together
> > with the other legacy vga stuff.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Well, it compiles...
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Queued for -next, thanks for the review.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 5+ messages in thread
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