From: Chris Wilson <chris@chris-wilson.co.uk>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Disable caches for Global GTT.
Date: Fri, 31 Oct 2014 07:44:34 +0000 [thread overview]
Message-ID: <20141031074434.GD18917@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <1414685898-24848-1-git-send-email-rodrigo.vivi@intel.com>
On Thu, Oct 30, 2014 at 09:18:18AM -0700, Rodrigo Vivi wrote:
> Global GTT doesn't have pat_sel[2:0] so it always point to pat_sel = 000;
> So the only way to avoid screen corruptions is setting PAT 0 to Uncached.
>
> MOCS can still be used though. But if userspace is trusting PTE for
> cache selection the safest thing to do is to let caches disabled.
>
> BSpec: "For GGTT, there is NO pat_sel[2:0] from the entry,
> so RTL will always use the value corresponding to pat_sel = 000"
>
> Reference: https://bugs.freedesktop.org/show_bug.cgi?id=85576
> Cc: James Ausmus <james.ausmus@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 29 +++++++++++++++++++++--------
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index cb7adab..24b4f27 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1911,14 +1911,27 @@ static void bdw_setup_private_ppat(struct drm_i915_private *dev_priv)
> {
> uint64_t pat;
>
> - pat = GEN8_PPAT(0, GEN8_PPAT_WB | GEN8_PPAT_LLC) | /* for normal objects, no eLLC */
> - GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
> - GEN8_PPAT(2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC) | /* for scanout with eLLC */
> - GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
> - GEN8_PPAT(4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0)) |
> - GEN8_PPAT(5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1)) |
> - GEN8_PPAT(6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2)) |
> - GEN8_PPAT(7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
Instead of deleting this and making a rather ugly if,
Just
> + if (!USES_PPGTT(dev_priv))
> + /* Spec: "For GGTT, there is NO pat_sel[2:0] from the entry,
> + * so RTL will always use the value corresponding to
> + * pat_sel = 000".
> + * So let's disable cache for GGTT to avoid screen corruptions.
> + * MOCS still can be used though.
> + */
> + pat = GEN8_PPAT(0, GEN8_PPAT_UC);
to override in the unlikely case of disabling ppgtt.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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next prev parent reply other threads:[~2014-10-31 7:44 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 16:18 [PATCH] drm/i915: Disable caches for Global GTT Rodrigo Vivi
2014-10-31 7:44 ` Chris Wilson [this message]
2014-10-31 10:14 ` Ville Syrjälä
2014-10-31 10:20 ` Chris Wilson
2014-10-31 12:27 ` Rodrigo Vivi
2014-10-31 21:38 ` Ausmus, James
2014-11-04 18:29 ` Ausmus, James
2014-11-05 11:11 ` Daniel Vetter
2014-11-06 0:56 ` Rodrigo Vivi
2014-11-06 16:40 ` Jani Nikula
2014-11-06 10:55 ` Chris Wilson
2014-11-06 19:09 ` Ville Syrjälä
2014-11-06 20:53 ` Ville Syrjälä
2014-11-06 21:55 ` Rodrigo Vivi
2014-11-07 9:33 ` Daniel Vetter
2014-11-07 9:51 ` Chris Wilson
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