From: Daniel Vetter <daniel@ffwll.ch>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 00/28] SKL stage 1, a few more patches
Date: Wed, 5 Nov 2014 12:28:27 +0100 [thread overview]
Message-ID: <20141105112827.GF26941@phenom.ffwll.local> (raw)
In-Reply-To: <1415120825-4375-1-git-send-email-damien.lespiau@intel.com>
On Tue, Nov 04, 2014 at 05:06:37PM +0000, Damien Lespiau wrote:
> We might as well try to push a few more patches while waiting for the next
> batch of reviews. Here's the WM code and 2 bonus patches around forcewake and
> rc6.
>
> The attentive reader will notice the lack of r-b tag for:
> "drm/i915/skl: Make res_blocks/lines intermediate values 32 bits"
>
> This patch does address the known review comment though. At some point we have
> to be realistic about our process, try to push stuff forward anyway, and have
> confidence we can fix problems when they arise, especially when the risk is low
> (new platform code, not running on any of the previous platforms).
>
> Next stop. SKL clocks.
Ok, vacuumed them all up into dinq, thanks. Some random comments while
reading through. I've mentioned that the wm code is mind-boggling, right?
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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prev parent reply other threads:[~2014-11-05 11:28 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-04 17:06 [PATCH 00/28] SKL stage 1, a few more patches Damien Lespiau
2014-11-04 17:06 ` [PATCH 01/28] drm/i915/skl: Read the Memory Latency Values for WM computation Damien Lespiau
2014-11-05 10:25 ` Daniel Vetter
2014-11-05 10:29 ` Daniel Vetter
2014-11-04 17:06 ` [PATCH 02/28] drm/i915/skl: Register definitions and macros for SKL Watermark regs Damien Lespiau
2014-11-04 17:06 ` [PATCH 03/28] drm/i915/skl: Definition of SKL WM param structs for pipe/plane Damien Lespiau
2014-11-04 17:06 ` [PATCH 04/28] drm/i915/skl: Add DDB allocation management structures Damien Lespiau
2014-11-04 17:06 ` [PATCH 05/28] drm/i915/skl: SKL Watermark Computation Damien Lespiau
2014-11-04 17:06 ` [PATCH 06/28] drm/i915/skl: Allocate DDB portions for display planes Damien Lespiau
2014-11-04 17:06 ` [PATCH 07/28] drm/i915/skl: Program the DDB allocation Damien Lespiau
2014-11-04 17:06 ` [PATCH 08/28] drm/i915/skl: Read the pipe WM HW state Damien Lespiau
2014-11-04 17:06 ` [PATCH 09/28] drm/i915/gen9: Add 2us read latency to WM level Damien Lespiau
2014-11-04 17:06 ` [PATCH 10/28] drm/i915/gen9: Disable WM if corresponding latency is 0 Damien Lespiau
2014-11-04 17:06 ` [PATCH 11/28] drm/i915/skl: Store the new WM state at the very end of the update Damien Lespiau
2014-11-04 17:06 ` [PATCH 12/28] drm/i915/skl: Read back the DDB allocation hw state Damien Lespiau
2014-11-04 17:06 ` [PATCH 13/28] drm/i915/skl: Augment the latency debugfs files for SKL Damien Lespiau
2014-11-04 17:06 ` [PATCH 14/28] drm/i915/skl: Add a debugfs file to dump the DDB allocation Damien Lespiau
2014-11-04 17:06 ` [PATCH 15/28] drm/i915/skl: Check the DDB state at modeset Damien Lespiau
2014-11-05 10:33 ` Daniel Vetter
2014-11-04 17:06 ` [PATCH 16/28] drm/i915/skl: Make 'end' of the DDB allocation entry exclusive Damien Lespiau
2014-11-04 17:06 ` [PATCH 17/28] drm/i915/skl: Use a more descriptive parameter name in skl_compute_plane_wm() Damien Lespiau
2014-11-04 17:06 ` [PATCH 18/28] drm/i915/skl: Make res_blocks/lines intermediate values 32 bits Damien Lespiau
2014-11-04 17:06 ` [PATCH 19/28] drm/i915/skl: Reduce the number of holes in struct skl_wm_level Damien Lespiau
2014-11-04 17:06 ` [PATCH 20/28] drm/i915/skl: Move all the WM compute functions in one place Damien Lespiau
2014-11-04 17:06 ` [PATCH 21/28] drm/i915/skl: Rework when the transition WMs are computed Damien Lespiau
2014-11-04 17:06 ` [PATCH 22/28] drm/i915/skl: Correctly align skl_compute_plane_wm() arguments Damien Lespiau
2014-11-04 17:07 ` [PATCH 23/28] drm/i915/skl: Reduce the indentation level in skl_write_wm_values() Damien Lespiau
2014-11-04 17:07 ` [PATCH 24/28] drm/i915/skl: Stage the pipe DDB allocation Damien Lespiau
2014-11-04 17:07 ` [PATCH 25/28] drm/i915/skl: Flush the WM configuration Damien Lespiau
2014-11-04 17:07 ` [PATCH 26/28] drm/i915/skl: Log the order in which we flush the pipes in the WM code Damien Lespiau
2014-11-04 17:07 ` [PATCH 27/28] drm/i915/skl: Gen9 Forcewake Damien Lespiau
2014-11-04 17:07 ` [PATCH 28/28] drm/i915/skl: Enable Gen9 RC6 Damien Lespiau
2014-11-05 11:28 ` Daniel Vetter [this message]
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