[PATCH] drm/i915: Assert that we successfully downclock the GPU before suspend

[PATCH] drm/i915: Assert that we successfully downclock the GPU before suspend

[Chris Wilson]

Before suspending, we wait upon the outstanding GPU requests and flush
our pending idle handlers. This should downclock the GPU to its lowest
power state. Add a WARN to check that the delayed tasks were run and did
their job properly.

Suggested-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4a1ca7abd7f9..e4fa0bc62c10 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4669,6 +4669,11 @@ i915_gem_suspend(struct drm_device *dev)
 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
 	flush_delayed_work(&dev_priv->mm.idle_work);
 
+	/* Assert that we sucessfully flushed all the work and
+	 * reset the GPU back to its idle, low power state.
+	 */
+	WARN_ON(dev_priv->mm.busy);
+
 	return 0;
 
 err:
-- 
2.1.3

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Re: [PATCH] drm/i915: Assert that we successfully downclock the GPU before suspend

[Daniel Vetter]

On Tue, Nov 25, 2014 at 11:56:33AM +0000, Chris Wilson wrote:
> Before suspending, we wait upon the outstanding GPU requests and flush
> our pending idle handlers. This should downclock the GPU to its lowest
> power state. Add a WARN to check that the delayed tasks were run and did
> their job properly.
> 
> Suggested-by: Akash Goel <akash.goel@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_gem.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4a1ca7abd7f9..e4fa0bc62c10 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4669,6 +4669,11 @@ i915_gem_suspend(struct drm_device *dev)
>  	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
>  	flush_delayed_work(&dev_priv->mm.idle_work);
>  
> +	/* Assert that we sucessfully flushed all the work and
> +	 * reset the GPU back to its idle, low power state.
> +	 */
> +	WARN_ON(dev_priv->mm.busy);
> +
>  	return 0;
>  
>  err:
> -- 
> 2.1.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH] drm/i915: Assert that we successfully downclock

[shuang.he]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -1              367/367              366/367
ILK                 -2              375/375              373/375
SNB                                  450/450              450/450
IVB                 -2              503/503              501/503
BYT                                  289/289              289/289
HSW                 -3              567/567              564/567
BDW                                  417/417              417/417
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt_gen3_render_tiledy_blits      PASS(2, M23)      CRASH(1, M23)
 ILK  igt_gem_reset_stats_close-pending-fork-render      TIMEOUT(16, M37M26)PASS(1, M26)      TIMEOUT(1, M37)
 ILK  igt_kms_flip_vblank-vs-hang      TIMEOUT(15, M37M26)PASS(1, M26)      TIMEOUT(1, M37)
 IVB  igt_gem_bad_reloc_negative-reloc      NSPT(16, M34M21M4)PASS(1, M21)      NSPT(1, M4)
 IVB  igt_gem_bad_reloc_negative-reloc-lut      NSPT(3, M21M34M4)PASS(17, M21M34M4)      NSPT(1, M4)
 HSW  igt_gem_bad_reloc_negative-reloc-lut      NSPT(26, M40M20M19)PASS(1, M20)      NSPT(1, M20)
*HSW  igt_kms_rotation_crc_primary-rotation      PASS(25, M20M40M19)      DMESG_WARN(1, M20)
*HSW  igt_pm_rc6_residency_rc6-accuracy      PASS(27, M20M40M19)      FAIL(1, M20)
Note: You need to pay more attention to line start with '*'
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