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* [PATCH] drm/i915/gen9: Implement WaDisableKillLogic for gen 9
@ 2015-07-14 13:26 Nick Hoath
  0 siblings, 0 replies; 4+ messages in thread
From: Nick Hoath @ 2015-07-14 13:26 UTC (permalink / raw)
  To: intel-gfx

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 2 +-
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 709b3c7..71ef18c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2880,7 +2880,7 @@ i915_gem_retire_requests_ring(struct intel_engine_cs *ring)
 			spin_lock_irqsave(&ring->execlist_lock, flags);
 
 			if (ctx_obj && (ctx != ring->default_context))
-				intel_lr_context_unpin(ring, ctx);
+				intel_lr_context_unpin(request);
 
 			intel_runtime_pm_put(dev_priv);
 			spin_unlock_irqrestore(&ring->execlist_lock, flags);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 059de0f..afa8972 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -160,6 +160,7 @@
 #define GAM_ECOCHK			0x4090
 #define   BDW_DISABLE_HDC_INVALIDATION	(1<<25)
 #define   ECOCHK_SNB_BIT		(1<<10)
+#define   ECOCHK_DIS_TLB		(1<<8)
 #define   HSW_ECOCHK_ARB_PRIO_SOL	(1<<6)
 #define   ECOCHK_PPGTT_CACHE64B		(0x3<<3)
 #define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f2be1ce..6986342 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -59,6 +59,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
 	/* WaEnableLbsSlaRetryTimerDecrement:skl */
 	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
 		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
+
+	/* WaDisableKillLogic:bxt,skl */
+	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
+		   ECOCHK_DIS_TLB);
 }
 
 static void skl_init_clock_gating(struct drm_device *dev)
-- 
2.1.1

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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH] drm/i915/gen9: Implement WaDisableKillLogic for gen 9
@ 2015-07-14 13:41 Nick Hoath
  2015-07-15 10:51 ` Mika Kuoppala
  0 siblings, 1 reply; 4+ messages in thread
From: Nick Hoath @ 2015-07-14 13:41 UTC (permalink / raw)
  To: intel-gfx

v2: Patch leakage fixed

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 059de0f..afa8972 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -160,6 +160,7 @@
 #define GAM_ECOCHK			0x4090
 #define   BDW_DISABLE_HDC_INVALIDATION	(1<<25)
 #define   ECOCHK_SNB_BIT		(1<<10)
+#define   ECOCHK_DIS_TLB		(1<<8)
 #define   HSW_ECOCHK_ARB_PRIO_SOL	(1<<6)
 #define   ECOCHK_PPGTT_CACHE64B		(0x3<<3)
 #define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f2be1ce..6986342 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -59,6 +59,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
 	/* WaEnableLbsSlaRetryTimerDecrement:skl */
 	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
 		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
+
+	/* WaDisableKillLogic:bxt,skl */
+	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
+		   ECOCHK_DIS_TLB);
 }
 
 static void skl_init_clock_gating(struct drm_device *dev)
-- 
2.1.1

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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/gen9: Implement WaDisableKillLogic for gen 9
  2015-07-14 13:41 [PATCH] drm/i915/gen9: Implement WaDisableKillLogic for gen 9 Nick Hoath
@ 2015-07-15 10:51 ` Mika Kuoppala
  2015-07-15 12:29   ` Daniel Vetter
  0 siblings, 1 reply; 4+ messages in thread
From: Mika Kuoppala @ 2015-07-15 10:51 UTC (permalink / raw)
  To: Nick Hoath, intel-gfx

Nick Hoath <nicholas.hoath@intel.com> writes:

> v2: Patch leakage fixed
>
> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 059de0f..afa8972 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -160,6 +160,7 @@
>  #define GAM_ECOCHK			0x4090
>  #define   BDW_DISABLE_HDC_INVALIDATION	(1<<25)
>  #define   ECOCHK_SNB_BIT		(1<<10)
> +#define   ECOCHK_DIS_TLB		(1<<8)
>  #define   HSW_ECOCHK_ARB_PRIO_SOL	(1<<6)
>  #define   ECOCHK_PPGTT_CACHE64B		(0x3<<3)
>  #define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index f2be1ce..6986342 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -59,6 +59,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
>  	/* WaEnableLbsSlaRetryTimerDecrement:skl */
>  	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
>  		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
> +
> +	/* WaDisableKillLogic:bxt,skl */
> +	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> +		   ECOCHK_DIS_TLB);
>  }
>  
>  static void skl_init_clock_gating(struct drm_device *dev)
> -- 
> 2.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/gen9: Implement WaDisableKillLogic for gen 9
  2015-07-15 10:51 ` Mika Kuoppala
@ 2015-07-15 12:29   ` Daniel Vetter
  0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2015-07-15 12:29 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

On Wed, Jul 15, 2015 at 01:51:05PM +0300, Mika Kuoppala wrote:
> Nick Hoath <nicholas.hoath@intel.com> writes:
> 
> > v2: Patch leakage fixed
> >
> > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

Queued for -next, thanks for the patch.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 1 +
> >  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> >  3 files changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 059de0f..afa8972 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -160,6 +160,7 @@
> >  #define GAM_ECOCHK			0x4090
> >  #define   BDW_DISABLE_HDC_INVALIDATION	(1<<25)
> >  #define   ECOCHK_SNB_BIT		(1<<10)
> > +#define   ECOCHK_DIS_TLB		(1<<8)
> >  #define   HSW_ECOCHK_ARB_PRIO_SOL	(1<<6)
> >  #define   ECOCHK_PPGTT_CACHE64B		(0x3<<3)
> >  #define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index f2be1ce..6986342 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -59,6 +59,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
> >  	/* WaEnableLbsSlaRetryTimerDecrement:skl */
> >  	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
> >  		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
> > +
> > +	/* WaDisableKillLogic:bxt,skl */
> > +	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> > +		   ECOCHK_DIS_TLB);
> >  }
> >  
> >  static void skl_init_clock_gating(struct drm_device *dev)
> > -- 
> > 2.1.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
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2015-07-14 13:41 [PATCH] drm/i915/gen9: Implement WaDisableKillLogic for gen 9 Nick Hoath
2015-07-15 10:51 ` Mika Kuoppala
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