* [PATCH 5/7] drm/i915: Update PV INFO page definition for Intel GVT-g
@ 2015-08-20 3:18 Zhiyuan Lv
0 siblings, 0 replies; 4+ messages in thread
From: Zhiyuan Lv @ 2015-08-20 3:18 UTC (permalink / raw)
To: intel-gfx; +Cc: igvt-g
Some more definitions in the PV info page are added. They are mainly
for the guest notification to Intel GVT-g device model. They are used
for Broadwell enabling.
Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
drivers/gpu/drm/i915/i915_vgpu.h | 34 ++++++++++++++++++++++++++++++++--
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index 97a88b5..21c97f4 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -40,6 +40,19 @@
#define INTEL_VGT_IF_VERSION \
INTEL_VGT_IF_VERSION_ENCODE(VGT_VERSION_MAJOR, VGT_VERSION_MINOR)
+/*
+ * notifications from guest to vgpu device model
+ */
+enum vgt_g2v_type {
+ VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE = 2,
+ VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY,
+ VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE,
+ VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY,
+ VGT_G2V_EXECLIST_CONTEXT_CREATE,
+ VGT_G2V_EXECLIST_CONTEXT_DESTROY,
+ VGT_G2V_MAX,
+};
+
struct vgt_if {
uint64_t magic; /* VGT_MAGIC */
uint16_t version_major;
@@ -70,11 +83,28 @@ struct vgt_if {
uint32_t rsv3[0x200 - 24]; /* pad to half page */
/*
* The bottom half page is for response from Gfx driver to hypervisor.
- * Set to reserved fields temporarily by now.
*/
uint32_t rsv4;
uint32_t display_ready; /* ready for display owner switch */
- uint32_t rsv5[0x200 - 2]; /* pad to one page */
+
+ uint32_t rsv5[4];
+
+ uint32_t g2v_notify;
+ uint32_t rsv6[7];
+
+ uint32_t pdp0_lo;
+ uint32_t pdp0_hi;
+ uint32_t pdp1_lo;
+ uint32_t pdp1_hi;
+ uint32_t pdp2_lo;
+ uint32_t pdp2_hi;
+ uint32_t pdp3_lo;
+ uint32_t pdp3_hi;
+
+ uint32_t execlist_context_descriptor_lo;
+ uint32_t execlist_context_descriptor_hi;
+
+ uint32_t rsv7[0x200 - 24]; /* pad to one page */
} __packed;
#define vgtif_reg(x) \
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 0/7] drm/intel: guest i915 changes for Broadwell to run inside VM with Intel GVT-g
@ 2015-08-20 7:45 Zhiyuan Lv
2015-08-20 7:45 ` [PATCH 5/7] drm/i915: Update PV INFO page definition for " Zhiyuan Lv
0 siblings, 1 reply; 4+ messages in thread
From: Zhiyuan Lv @ 2015-08-20 7:45 UTC (permalink / raw)
To: intel-gfx; +Cc: igvt-g
I915 kernel driver can now work inside a virtual machine on Haswell
with Intel GVT-g. In order to do the same thing on Broadwell, there
are some extra changes needed. The two main things are to support the
more complicated PPGTT page table structure and EXECLIST contexts.
GVT-g will perform shadow PPGTT and shadow context, which requires
guest driver to explicitly notify host device model the life cycle of
PPGTT and EXECLIST contexts.
The first and the forth patches added some restrictions to drivers in
virtualization scenario to make the shadow work easier. The first
patch is based on Mika's earlier one, but we use it for vgpu only.
The sixth patch is the implementation of the notification for
shadowing.
Zhiyuan Lv (7):
drm/i915: preallocate pdps for 32 bit vgpu
drm/i915: Enable full ppgtt for vgpu
drm/i915: Always enable execlists on BDW for vgpu
drm/i915: always pin lrc context for vgpu with Intel GVT-g
drm/i915: Update PV INFO page definition for Intel GVT-g
drm/i915: guest i915 notification for Intel-GVTg
drm/i915: Allow Broadwell guest with Intel GVT-g
drivers/gpu/drm/i915/i915_gem_gtt.c | 77 +++++++++++++++++++++++++++++++++++--
drivers/gpu/drm/i915/i915_vgpu.c | 2 +-
drivers/gpu/drm/i915/i915_vgpu.h | 34 +++++++++++++++-
drivers/gpu/drm/i915/intel_lrc.c | 44 ++++++++++++++++++---
4 files changed, 145 insertions(+), 12 deletions(-)
--
1.9.1
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 5/7] drm/i915: Update PV INFO page definition for Intel GVT-g
2015-08-20 7:45 [PATCH 0/7] drm/intel: guest i915 changes for Broadwell to run inside VM with " Zhiyuan Lv
@ 2015-08-20 7:45 ` Zhiyuan Lv
2015-08-20 12:58 ` Joonas Lahtinen
0 siblings, 1 reply; 4+ messages in thread
From: Zhiyuan Lv @ 2015-08-20 7:45 UTC (permalink / raw)
To: intel-gfx; +Cc: igvt-g
Some more definitions in the PV info page are added. They are mainly
for the guest notification to Intel GVT-g device model. They are used
for Broadwell enabling.
Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
drivers/gpu/drm/i915/i915_vgpu.h | 34 ++++++++++++++++++++++++++++++++--
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index 97a88b5..21c97f4 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -40,6 +40,19 @@
#define INTEL_VGT_IF_VERSION \
INTEL_VGT_IF_VERSION_ENCODE(VGT_VERSION_MAJOR, VGT_VERSION_MINOR)
+/*
+ * notifications from guest to vgpu device model
+ */
+enum vgt_g2v_type {
+ VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE = 2,
+ VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY,
+ VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE,
+ VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY,
+ VGT_G2V_EXECLIST_CONTEXT_CREATE,
+ VGT_G2V_EXECLIST_CONTEXT_DESTROY,
+ VGT_G2V_MAX,
+};
+
struct vgt_if {
uint64_t magic; /* VGT_MAGIC */
uint16_t version_major;
@@ -70,11 +83,28 @@ struct vgt_if {
uint32_t rsv3[0x200 - 24]; /* pad to half page */
/*
* The bottom half page is for response from Gfx driver to hypervisor.
- * Set to reserved fields temporarily by now.
*/
uint32_t rsv4;
uint32_t display_ready; /* ready for display owner switch */
- uint32_t rsv5[0x200 - 2]; /* pad to one page */
+
+ uint32_t rsv5[4];
+
+ uint32_t g2v_notify;
+ uint32_t rsv6[7];
+
+ uint32_t pdp0_lo;
+ uint32_t pdp0_hi;
+ uint32_t pdp1_lo;
+ uint32_t pdp1_hi;
+ uint32_t pdp2_lo;
+ uint32_t pdp2_hi;
+ uint32_t pdp3_lo;
+ uint32_t pdp3_hi;
+
+ uint32_t execlist_context_descriptor_lo;
+ uint32_t execlist_context_descriptor_hi;
+
+ uint32_t rsv7[0x200 - 24]; /* pad to one page */
} __packed;
#define vgtif_reg(x) \
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 5/7] drm/i915: Update PV INFO page definition for Intel GVT-g
2015-08-20 7:45 ` [PATCH 5/7] drm/i915: Update PV INFO page definition for " Zhiyuan Lv
@ 2015-08-20 12:58 ` Joonas Lahtinen
2015-08-21 2:27 ` Zhiyuan Lv
0 siblings, 1 reply; 4+ messages in thread
From: Joonas Lahtinen @ 2015-08-20 12:58 UTC (permalink / raw)
To: Zhiyuan Lv, intel-gfx; +Cc: igvt-g
On to, 2015-08-20 at 15:45 +0800, Zhiyuan Lv wrote:
> Some more definitions in the PV info page are added. They are mainly
> for the guest notification to Intel GVT-g device model. They are used
> for Broadwell enabling.
>
> Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Is there any public document about the interface?
> ---
> drivers/gpu/drm/i915/i915_vgpu.h | 34
> ++++++++++++++++++++++++++++++++--
> 1 file changed, 32 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.h
> b/drivers/gpu/drm/i915/i915_vgpu.h
> index 97a88b5..21c97f4 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.h
> +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> @@ -40,6 +40,19 @@
> #define INTEL_VGT_IF_VERSION \
> INTEL_VGT_IF_VERSION_ENCODE(VGT_VERSION_MAJOR,
> VGT_VERSION_MINOR)
>
> +/*
> + * notifications from guest to vgpu device model
> + */
> +enum vgt_g2v_type {
> + VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE = 2,
> + VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY,
> + VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE,
> + VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY,
> + VGT_G2V_EXECLIST_CONTEXT_CREATE,
> + VGT_G2V_EXECLIST_CONTEXT_DESTROY,
> + VGT_G2V_MAX,
> +};
> +
> struct vgt_if {
> uint64_t magic; /* VGT_MAGIC */
> uint16_t version_major;
> @@ -70,11 +83,28 @@ struct vgt_if {
> uint32_t rsv3[0x200 - 24]; /* pad to half page */
> /*
> * The bottom half page is for response from Gfx driver to
> hypervisor.
> - * Set to reserved fields temporarily by now.
> */
> uint32_t rsv4;
> uint32_t display_ready; /* ready for display owner
> switch */
> - uint32_t rsv5[0x200 - 2]; /* pad to one page */
> +
> + uint32_t rsv5[4];
> +
> + uint32_t g2v_notify;
> + uint32_t rsv6[7];
> +
> + uint32_t pdp0_lo;
> + uint32_t pdp0_hi;
> + uint32_t pdp1_lo;
> + uint32_t pdp1_hi;
> + uint32_t pdp2_lo;
> + uint32_t pdp2_hi;
> + uint32_t pdp3_lo;
> + uint32_t pdp3_hi;
> +
> + uint32_t execlist_context_descriptor_lo;
> + uint32_t execlist_context_descriptor_hi;
> +
> + uint32_t rsv7[0x200 - 24]; /* pad to one page */
> } __packed;
>
> #define vgtif_reg(x) \
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH 5/7] drm/i915: Update PV INFO page definition for Intel GVT-g
2015-08-20 12:58 ` Joonas Lahtinen
@ 2015-08-21 2:27 ` Zhiyuan Lv
0 siblings, 0 replies; 4+ messages in thread
From: Zhiyuan Lv @ 2015-08-21 2:27 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: intel-gfx, igvt-g
On Thu, Aug 20, 2015 at 03:58:43PM +0300, Joonas Lahtinen wrote:
> On to, 2015-08-20 at 15:45 +0800, Zhiyuan Lv wrote:
> > Some more definitions in the PV info page are added. They are mainly
> > for the guest notification to Intel GVT-g device model. They are used
> > for Broadwell enabling.
> >
> > Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
> > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> >
>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>
> Is there any public document about the interface?
So far no ... The information we got is that the 4K MMIO range from 0x78000
is reserved for virtualization usage, but the detailed definition will not
appear in spec. Thanks!
>
> > ---
> > drivers/gpu/drm/i915/i915_vgpu.h | 34
> > ++++++++++++++++++++++++++++++++--
> > 1 file changed, 32 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_vgpu.h
> > b/drivers/gpu/drm/i915/i915_vgpu.h
> > index 97a88b5..21c97f4 100644
> > --- a/drivers/gpu/drm/i915/i915_vgpu.h
> > +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> > @@ -40,6 +40,19 @@
> > #define INTEL_VGT_IF_VERSION \
> > INTEL_VGT_IF_VERSION_ENCODE(VGT_VERSION_MAJOR,
> > VGT_VERSION_MINOR)
> >
> > +/*
> > + * notifications from guest to vgpu device model
> > + */
> > +enum vgt_g2v_type {
> > + VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE = 2,
> > + VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY,
> > + VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE,
> > + VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY,
> > + VGT_G2V_EXECLIST_CONTEXT_CREATE,
> > + VGT_G2V_EXECLIST_CONTEXT_DESTROY,
> > + VGT_G2V_MAX,
> > +};
> > +
> > struct vgt_if {
> > uint64_t magic; /* VGT_MAGIC */
> > uint16_t version_major;
> > @@ -70,11 +83,28 @@ struct vgt_if {
> > uint32_t rsv3[0x200 - 24]; /* pad to half page */
> > /*
> > * The bottom half page is for response from Gfx driver to
> > hypervisor.
> > - * Set to reserved fields temporarily by now.
> > */
> > uint32_t rsv4;
> > uint32_t display_ready; /* ready for display owner
> > switch */
> > - uint32_t rsv5[0x200 - 2]; /* pad to one page */
> > +
> > + uint32_t rsv5[4];
> > +
> > + uint32_t g2v_notify;
> > + uint32_t rsv6[7];
> > +
> > + uint32_t pdp0_lo;
> > + uint32_t pdp0_hi;
> > + uint32_t pdp1_lo;
> > + uint32_t pdp1_hi;
> > + uint32_t pdp2_lo;
> > + uint32_t pdp2_hi;
> > + uint32_t pdp3_lo;
> > + uint32_t pdp3_hi;
> > +
> > + uint32_t execlist_context_descriptor_lo;
> > + uint32_t execlist_context_descriptor_hi;
> > +
> > + uint32_t rsv7[0x200 - 24]; /* pad to one page */
> > } __packed;
> >
> > #define vgtif_reg(x) \
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
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2015-08-20 7:45 [PATCH 0/7] drm/intel: guest i915 changes for Broadwell to run inside VM with " Zhiyuan Lv
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