From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: Deepak M <m.deepak@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [RFC PATCH 04/10] drm/i915/bxt: fix dsi hw state pipe readout
Date: Wed, 16 Mar 2016 17:11:13 +0200 [thread overview]
Message-ID: <20160316151113.GJ4329@intel.com> (raw)
In-Reply-To: <8bea85b86aaf7a15f854a656bf8d3208a3afe0bd.1458070700.git.jani.nikula@intel.com>
On Tue, Mar 15, 2016 at 09:51:12PM +0200, Jani Nikula wrote:
> BXT isn't as limited as BYT and CHT regarding DSI pipes and ports.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_dsi.c | 14 +++++++++++++-
> 2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 7dfc4007f3fa..a5035991dd57 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8144,6 +8144,7 @@ enum skl_disp_power_wells {
> #define READ_REQUEST_PRIORITY_HIGH (3 << 3)
> #define RGB_FLIP_TO_BGR (1 << 2)
>
> +#define BXT_PIPE_SELECT_SHIFT 7
> #define BXT_PIPE_SELECT_MASK (7 << 7)
> #define BXT_PIPE_SELECT(pipe) ((pipe) << 7)
These defines look a little misplaced, but that's separate topic.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 6574b9ac3698..73c15210fdb1 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -700,7 +700,19 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
> if (!(I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY))
> continue;
>
> - *pipe = port == PORT_A ? PIPE_A : PIPE_B;
> + if (IS_BROXTON(dev_priv)) {
> + u32 tmp = I915_READ(MIPI_CTRL(port));
> + tmp &= BXT_PIPE_SELECT_MASK;
> + tmp >>= BXT_PIPE_SELECT_SHIFT;
> +
> + if (WARN_ON(tmp > PIPE_C))
> + continue;
> +
> + *pipe = tmp;
> + } else {
> + *pipe = port == PORT_A ? PIPE_A : PIPE_B;
> + }
> +
> active = true;
> break;
> }
> --
> 2.1.4
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2016-03-16 15:11 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-15 19:51 [RFC PATCH 00/10] drm/i915/bxt: add dsi transcoders Jani Nikula
2016-03-15 19:51 ` [RFC PATCH 01/10] drm/i915: add for_each_port_masked macro Jani Nikula
2016-03-16 15:07 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 02/10] drm/i915: make transcoder_name return a string Jani Nikula
2016-03-16 14:46 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 03/10] drm/i915/dsi: refactor dsi get hw state readout Jani Nikula
2016-03-16 15:09 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 04/10] drm/i915/bxt: fix dsi hw state pipe readout Jani Nikula
2016-03-16 15:11 ` Ville Syrjälä [this message]
2016-03-16 16:19 ` Jani Nikula
2016-03-15 19:51 ` [RFC PATCH 05/10] drm/i915: split get/set pipe timings to pipe and transcoder parts Jani Nikula
2016-03-16 15:02 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 06/10] drm/i915: split set pipeconf " Jani Nikula
2016-03-16 15:15 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 07/10] drm/i915: abstract get config for cpu transcoder Jani Nikula
2016-03-16 15:20 ` Ville Syrjälä
2016-03-16 15:26 ` Jani Nikula
2016-03-16 15:32 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 08/10] drm/i915/bxt: add dsi transcoders Jani Nikula
2016-03-16 15:24 ` Ville Syrjälä
2016-03-15 19:51 ` [RFC PATCH 09/10] drm/i915/dsi: use the BIT macro for clarity Jani Nikula
2016-03-15 19:51 ` [RFC PATCH 10/10] drm/i915/bxt: allow dsi on any pipe Jani Nikula
2016-03-16 7:59 ` ✗ Fi.CI.BAT: failure for drm/i915/bxt: add dsi transcoders Patchwork
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