[PATCH v2] drm/i915/bdw: Do not write the replay bit of the ring mode register

[PATCH v2] drm/i915/bdw: Do not write the replay bit of the ring mode register

[Kelvin Gardiner]

The replay bit of the ring mode register is not a valid bit for Gen8+. Do not
write to this bit.

Signed-off-by: Kelvin Gardiner <kelvin.gardiner@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Ceraolo Spurio, Daniele <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 1c6c716..f9a8545 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1178,7 +1178,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine)
 
 	I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
 	I915_WRITE(RING_MODE_GEN7(engine),
-		   _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
 		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
 	I915_WRITE(RING_HWS_PGA(engine->mmio_base),
 		   engine->status_page.ggtt_offset);
-- 
1.9.1

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Re: [PATCH v2] drm/i915/bdw: Do not write the replay bit of the ring mode register

[Daniele Ceraolo Spurio]

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

On 24/02/17 11:15, Kelvin Gardiner wrote:
> The replay bit of the ring mode register is not a valid bit for Gen8+. Do not
> write to this bit.
>
> Signed-off-by: Kelvin Gardiner <kelvin.gardiner@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Ceraolo Spurio, Daniele <daniele.ceraolospurio@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 1c6c716..f9a8545 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1178,7 +1178,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine)
>
>  	I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
>  	I915_WRITE(RING_MODE_GEN7(engine),
> -		   _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
>  		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
>  	I915_WRITE(RING_HWS_PGA(engine->mmio_base),
>  		   engine->status_page.ggtt_offset);
>
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✓ Fi.CI.BAT: success for drm/i915/bdw: Do not write the replay bit of the ring mode register

[Patchwork]

== Series Details ==

Series: drm/i915/bdw: Do not write the replay bit of the ring mode register
URL   : https://patchwork.freedesktop.org/series/20221/
State : success

== Summary ==

Series 20221v1 drm/i915/bdw: Do not write the replay bit of the ring mode register
https://patchwork.freedesktop.org/api/1.0/series/20221/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
fi-bxt-t5700     total:108  pass:95   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50 
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17 
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18 
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29 

9243ada504db810aa40b0e8f5e00d46871c78149 drm-tip: 2017y-02m-24d-17h-52m-18s UTC integration manifest
c095b7a drm/i915/bdw: Do not write the replay bit of the ring mode register

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3965/
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Re: [PATCH v2] drm/i915/bdw: Do not write the replay bit of the ring mode register

[Joonas Lahtinen]

On pe, 2017-02-24 at 11:48 -0800, Daniele Ceraolo Spurio wrote:
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Pushed, thanks for the patch and review.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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