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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for series starting with [passive,aggressive,RESEND,1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes
Date: Thu, 15 Jun 2017 12:59:44 -0000	[thread overview]
Message-ID: <20170615125944.4065.1140@emeril.freedesktop.org> (raw)
In-Reply-To: <20170615123850.26843-1-chris@chris-wilson.co.uk>

== Series Details ==

Series: series starting with [passive,aggressive,RESEND,1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes
URL   : https://patchwork.freedesktop.org/series/25841/
State : success

== Summary ==

Series 25841v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/25841/revisions/1/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                fail       -> PASS       (fi-snb-2600) fdo#100007
Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                dmesg-warn -> PASS       (fi-kbl-7560u) fdo#100125
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                pass       -> FAIL       (fi-snb-2600) fdo#100215 +1

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:466s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:485s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:587s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:550s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:492s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:488s
fi-glk-2a        total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:590s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:432s
fi-hsw-4770r     total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:16  time:420s
fi-ilk-650       total:278  pass:227  dwarn:0   dfail:0   fail:0   skip:50  time:462s
fi-ivb-3520m     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:18  time:502s
fi-ivb-3770      total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:18  time:514s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:482s
fi-kbl-7560u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:572s
fi-kbl-r         total:278  pass:259  dwarn:1   dfail:0   fail:0   skip:18  time:577s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:483s
fi-skl-6700hq    total:278  pass:228  dwarn:1   dfail:0   fail:27  skip:22  time:447s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:511s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:506s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:510s
fi-snb-2520m     total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:28  time:626s
fi-snb-2600      total:278  pass:246  dwarn:0   dfail:0   fail:2   skip:29  time:404s

94b0761a394e3d61e51bc920d0201364c21690d6 drm-tip: 2017y-06m-15d-10h-05m-24s UTC integration manifest
502a2ef drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
ad420fb drm/i915: Mark CPU cache as dirty on every transition for CPU writes

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4959/
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  parent reply	other threads:[~2017-06-15 12:59 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-15 12:38 [passive aggressive RESEND 1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes Chris Wilson
2017-06-15 12:38 ` [passive aggressive RESEND 2/2] drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty Chris Wilson
2017-06-15 14:41   ` Tvrtko Ursulin
2017-06-16 10:04     ` Chris Wilson
2017-06-16 10:54   ` [PATCH v2] " Chris Wilson
2017-06-16 11:10     ` Tvrtko Ursulin
2017-06-15 12:59 ` Patchwork [this message]
2017-06-15 14:28 ` [passive aggressive RESEND 1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes Tvrtko Ursulin
2017-06-16 11:26   ` Chris Wilson
2017-06-16 12:05     ` Tvrtko Ursulin
2017-06-16 12:13       ` Chris Wilson
2017-06-16 12:59         ` Tvrtko Ursulin
2017-06-16 13:56           ` Chris Wilson
2017-06-16 11:11 ` ✗ Fi.CI.BAT: warning for series starting with [passive,aggressive,RESEND,1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes (rev2) Patchwork

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