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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: warning for series starting with [passive,aggressive,RESEND,1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes (rev2)
Date: Fri, 16 Jun 2017 11:11:48 -0000	[thread overview]
Message-ID: <20170616111148.32285.32088@emeril.freedesktop.org> (raw)
In-Reply-To: <20170615123850.26843-1-chris@chris-wilson.co.uk>

== Series Details ==

Series: series starting with [passive,aggressive,RESEND,1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes (rev2)
URL   : https://patchwork.freedesktop.org/series/25841/
State : warning

== Summary ==

Series 25841v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/25841/revisions/2/mbox/

Test gem_exec_suspend:
        Subgroup basic-s4-devices:
                dmesg-warn -> PASS       (fi-kbl-7560u) fdo#100125
Test kms_busy:
        Subgroup basic-flip-default-b:
                fail       -> DMESG-WARN (fi-skl-6700hq) fdo#101144
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                fail       -> PASS       (fi-snb-2600) fdo#100215
Test kms_flip:
        Subgroup basic-flip-vs-dpms:
                pass       -> DMESG-WARN (fi-bsw-n3050)

fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:464s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:491s
fi-bsw-n3050     total:278  pass:241  dwarn:1   dfail:0   fail:0   skip:36  time:596s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:549s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:498s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:494s
fi-glk-2a        total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:590s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:429s
fi-hsw-4770r     total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:16  time:417s
fi-ilk-650       total:278  pass:227  dwarn:0   dfail:0   fail:0   skip:50  time:466s
fi-ivb-3520m     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:18  time:494s
fi-ivb-3770      total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:18  time:511s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:475s
fi-kbl-7560u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:573s
fi-kbl-r         total:278  pass:259  dwarn:1   dfail:0   fail:0   skip:18  time:583s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:487s
fi-skl-6700hq    total:278  pass:228  dwarn:2   dfail:0   fail:26  skip:22  time:443s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:515s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:506s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:509s
fi-snb-2600      total:278  pass:247  dwarn:0   dfail:0   fail:1   skip:29  time:405s
fi-snb-2520m failed to connect after reboot

728e84dbddb4fc5f7a4e48dafcda215c527737ca drm-tip: 2017y-06m-16d-07h-10m-54s UTC integration manifest
5888c4d drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
ce9e414 drm/i915: Mark CPU cache as dirty on every transition for CPU writes

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4967/
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      parent reply	other threads:[~2017-06-16 11:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-15 12:38 [passive aggressive RESEND 1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes Chris Wilson
2017-06-15 12:38 ` [passive aggressive RESEND 2/2] drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty Chris Wilson
2017-06-15 14:41   ` Tvrtko Ursulin
2017-06-16 10:04     ` Chris Wilson
2017-06-16 10:54   ` [PATCH v2] " Chris Wilson
2017-06-16 11:10     ` Tvrtko Ursulin
2017-06-15 12:59 ` ✓ Fi.CI.BAT: success for series starting with [passive,aggressive,RESEND,1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes Patchwork
2017-06-15 14:28 ` [passive aggressive RESEND 1/2] " Tvrtko Ursulin
2017-06-16 11:26   ` Chris Wilson
2017-06-16 12:05     ` Tvrtko Ursulin
2017-06-16 12:13       ` Chris Wilson
2017-06-16 12:59         ` Tvrtko Ursulin
2017-06-16 13:56           ` Chris Wilson
2017-06-16 11:11 ` Patchwork [this message]

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