* [PATCH] drm/i915: Include mbox details for pcode read/write failures
@ 2017-07-28 8:50 Chris Wilson
2017-07-28 9:11 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-07-28 9:28 ` [PATCH] " Daniel Vetter
0 siblings, 2 replies; 4+ messages in thread
From: Chris Wilson @ 2017-07-28 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter
If we fail at punit communication, include both the mbox address and the
value we tried to write so that we can identify the invalid sequence.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_pm.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 48785ef75d33..8711c1f04079 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8831,6 +8831,7 @@ static inline int gen6_check_mailbox_status(struct drm_i915_private *dev_priv)
case GEN6_PCODE_SUCCESS:
return 0;
case GEN6_PCODE_UNIMPLEMENTED_CMD:
+ return -ENODEV;
case GEN6_PCODE_ILLEGAL_CMD:
return -ENXIO;
case GEN6_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE:
@@ -8878,7 +8879,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
*/
if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
- DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed\n");
+ DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps\n",
+ mbox, __builtin_return_address(0));
return -EAGAIN;
}
@@ -8889,7 +8891,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
if (__intel_wait_for_register_fw(dev_priv,
GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
500, 0, NULL)) {
- DRM_ERROR("timeout waiting for pcode read (%d) to finish\n", mbox);
+ DRM_ERROR("timeout waiting for pcode read (from mbox %x) to finish for %ps\n",
+ mbox, __builtin_return_address(0));
return -ETIMEDOUT;
}
@@ -8902,8 +8905,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
status = gen6_check_mailbox_status(dev_priv);
if (status) {
- DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed: %d\n",
- status);
+ DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n",
+ mbox, __builtin_return_address(0), status);
return status;
}
@@ -8923,7 +8926,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
*/
if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
- DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed\n");
+ DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps\n",
+ val, mbox, __builtin_return_address(0));
return -EAGAIN;
}
@@ -8934,7 +8938,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
if (__intel_wait_for_register_fw(dev_priv,
GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
500, 0, NULL)) {
- DRM_ERROR("timeout waiting for pcode write (%d) to finish\n", mbox);
+ DRM_ERROR("timeout waiting for pcode write of 0x%08x to mbox %x to finish for %ps\n",
+ val, mbox, __builtin_return_address(0));
return -ETIMEDOUT;
}
@@ -8946,8 +8951,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
status = gen6_check_mailbox_status(dev_priv);
if (status) {
- DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed: %d\n",
- status);
+ DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n",
+ val, mbox, __builtin_return_address(0), status);
return status;
}
--
2.13.3
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^ permalink raw reply related [flat|nested] 4+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915: Include mbox details for pcode read/write failures
2017-07-28 8:50 [PATCH] drm/i915: Include mbox details for pcode read/write failures Chris Wilson
@ 2017-07-28 9:11 ` Patchwork
2017-07-28 9:28 ` [PATCH] " Daniel Vetter
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2017-07-28 9:11 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Include mbox details for pcode read/write failures
URL : https://patchwork.freedesktop.org/series/28030/
State : success
== Summary ==
Series 28030v1 drm/i915: Include mbox details for pcode read/write failures
https://patchwork.freedesktop.org/api/1.0/series/28030/revisions/1/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass -> FAIL (fi-snb-2600) fdo#100007
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fi-bdw-5557u total:280 pass:269 dwarn:0 dfail:0 fail:0 skip:11 time:444s
fi-bdw-gvtdvm total:280 pass:266 dwarn:0 dfail:0 fail:0 skip:14 time:432s
fi-blb-e6850 total:280 pass:225 dwarn:1 dfail:0 fail:0 skip:54 time:355s
fi-bsw-n3050 total:280 pass:244 dwarn:0 dfail:0 fail:0 skip:36 time:535s
fi-bxt-j4205 total:280 pass:261 dwarn:0 dfail:0 fail:0 skip:19 time:512s
fi-byt-j1900 total:280 pass:255 dwarn:1 dfail:0 fail:0 skip:24 time:490s
fi-byt-n2820 total:280 pass:251 dwarn:1 dfail:0 fail:0 skip:28 time:485s
fi-glk-2a total:280 pass:261 dwarn:0 dfail:0 fail:0 skip:19 time:604s
fi-hsw-4770 total:280 pass:264 dwarn:0 dfail:0 fail:0 skip:16 time:444s
fi-hsw-4770r total:280 pass:264 dwarn:0 dfail:0 fail:0 skip:16 time:418s
fi-ilk-650 total:280 pass:230 dwarn:0 dfail:0 fail:0 skip:50 time:419s
fi-ivb-3520m total:280 pass:262 dwarn:0 dfail:0 fail:0 skip:18 time:510s
fi-ivb-3770 total:280 pass:262 dwarn:0 dfail:0 fail:0 skip:18 time:476s
fi-kbl-7500u total:280 pass:262 dwarn:0 dfail:0 fail:0 skip:18 time:473s
fi-kbl-7560u total:280 pass:270 dwarn:0 dfail:0 fail:0 skip:10 time:586s
fi-kbl-r total:280 pass:262 dwarn:0 dfail:0 fail:0 skip:18 time:583s
fi-skl-6260u total:280 pass:270 dwarn:0 dfail:0 fail:0 skip:10 time:460s
fi-skl-6700hq total:280 pass:263 dwarn:0 dfail:0 fail:0 skip:17 time:584s
fi-skl-6700k total:280 pass:262 dwarn:0 dfail:0 fail:0 skip:18 time:471s
fi-skl-6770hq total:280 pass:270 dwarn:0 dfail:0 fail:0 skip:10 time:473s
fi-skl-gvtdvm total:280 pass:267 dwarn:0 dfail:0 fail:0 skip:13 time:442s
fi-skl-x1585l total:280 pass:270 dwarn:0 dfail:0 fail:0 skip:10 time:501s
fi-snb-2520m total:280 pass:252 dwarn:0 dfail:0 fail:0 skip:28 time:542s
fi-snb-2600 total:280 pass:250 dwarn:0 dfail:0 fail:1 skip:29 time:409s
fi-pnv-d510 failed to collect. IGT log at Patchwork_5292/fi-pnv-d510/igt.log
bd19696b0fe9ea167b685fe65ee2e1195e688cfd drm-tip: 2017y-07m-28d-04h-11m-30s UTC integration manifest
062a23d1ebf0 drm/i915: Include mbox details for pcode read/write failures
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5292/
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] drm/i915: Include mbox details for pcode read/write failures
2017-07-28 8:50 [PATCH] drm/i915: Include mbox details for pcode read/write failures Chris Wilson
2017-07-28 9:11 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-07-28 9:28 ` Daniel Vetter
2017-07-28 10:05 ` Chris Wilson
1 sibling, 1 reply; 4+ messages in thread
From: Daniel Vetter @ 2017-07-28 9:28 UTC (permalink / raw)
To: Chris Wilson; +Cc: Daniel Vetter, intel-gfx
On Fri, Jul 28, 2017 at 09:50:22AM +0100, Chris Wilson wrote:
> If we fail at punit communication, include both the mbox address and the
> value we tried to write so that we can identify the invalid sequence.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Seems like some really useful debug info.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 21 +++++++++++++--------
> 1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 48785ef75d33..8711c1f04079 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8831,6 +8831,7 @@ static inline int gen6_check_mailbox_status(struct drm_i915_private *dev_priv)
> case GEN6_PCODE_SUCCESS:
> return 0;
> case GEN6_PCODE_UNIMPLEMENTED_CMD:
> + return -ENODEV;
> case GEN6_PCODE_ILLEGAL_CMD:
> return -ENXIO;
> case GEN6_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE:
> @@ -8878,7 +8879,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
> */
>
> if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
> - DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed\n");
> + DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps\n",
> + mbox, __builtin_return_address(0));
> return -EAGAIN;
> }
>
> @@ -8889,7 +8891,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
> if (__intel_wait_for_register_fw(dev_priv,
> GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
> 500, 0, NULL)) {
> - DRM_ERROR("timeout waiting for pcode read (%d) to finish\n", mbox);
> + DRM_ERROR("timeout waiting for pcode read (from mbox %x) to finish for %ps\n",
> + mbox, __builtin_return_address(0));
> return -ETIMEDOUT;
> }
>
> @@ -8902,8 +8905,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
> status = gen6_check_mailbox_status(dev_priv);
>
> if (status) {
> - DRM_DEBUG_DRIVER("warning: pcode (read) mailbox access failed: %d\n",
> - status);
> + DRM_DEBUG_DRIVER("warning: pcode (read from mbox %x) mailbox access failed for %ps: %d\n",
> + mbox, __builtin_return_address(0), status);
> return status;
> }
>
> @@ -8923,7 +8926,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
> */
>
> if (I915_READ_FW(GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) {
> - DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed\n");
> + DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps\n",
> + val, mbox, __builtin_return_address(0));
> return -EAGAIN;
> }
>
> @@ -8934,7 +8938,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
> if (__intel_wait_for_register_fw(dev_priv,
> GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
> 500, 0, NULL)) {
> - DRM_ERROR("timeout waiting for pcode write (%d) to finish\n", mbox);
> + DRM_ERROR("timeout waiting for pcode write of 0x%08x to mbox %x to finish for %ps\n",
> + val, mbox, __builtin_return_address(0));
> return -ETIMEDOUT;
> }
>
> @@ -8946,8 +8951,8 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
> status = gen6_check_mailbox_status(dev_priv);
>
> if (status) {
> - DRM_DEBUG_DRIVER("warning: pcode (write) mailbox access failed: %d\n",
> - status);
> + DRM_DEBUG_DRIVER("warning: pcode (write of 0x%08x to mbox %x) mailbox access failed for %ps: %d\n",
> + val, mbox, __builtin_return_address(0), status);
> return status;
> }
>
> --
> 2.13.3
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] drm/i915: Include mbox details for pcode read/write failures
2017-07-28 9:28 ` [PATCH] " Daniel Vetter
@ 2017-07-28 10:05 ` Chris Wilson
0 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2017-07-28 10:05 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Daniel Vetter, intel-gfx
Quoting Daniel Vetter (2017-07-28 10:28:05)
> On Fri, Jul 28, 2017 at 09:50:22AM +0100, Chris Wilson wrote:
> > If we fail at punit communication, include both the mbox address and the
> > value we tried to write so that we can identify the invalid sequence.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Seems like some really useful debug info.
>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Yup, applied so we can continue the detective work...
-Chris
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-07-28 8:50 [PATCH] drm/i915: Include mbox details for pcode read/write failures Chris Wilson
2017-07-28 9:11 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-07-28 9:28 ` [PATCH] " Daniel Vetter
2017-07-28 10:05 ` Chris Wilson
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