* [PATCH i-g-t 2/7] tools/intel_watermark: Print linetime wms in usec
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
@ 2017-09-15 17:57 ` Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 3/7] tools/intel_watermark: Update intel_watermark with SKL support Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2017-09-15 17:57 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's print the linetime watermarks un usecs. Might make it easier to
spot bogus values.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e6384d65ba71..f73e9a89edab 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -240,8 +240,10 @@ static void ilk_wm_dump(void)
}
if (is_hsw_plus(devid)) {
for (i = 0; i < num_pipes; i++) {
- printf("WM_LINETIME_%c: line time=%d, ips line time=%d\n",
- pipe_name(i), wm.linetime[i].linetime, wm.linetime[i].ips);
+ printf("WM_LINETIME_%c: line time=%d (%.3f usec), ips line time=%d (%.3f usec)\n",
+ pipe_name(i),
+ wm.linetime[i].linetime, wm.linetime[i].linetime * 0.125f,
+ wm.linetime[i].ips, wm.linetime[i].ips * 0.125f);
}
}
if (is_gen7_plus(devid)) {
--
2.13.5
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH i-g-t 3/7] tools/intel_watermark: Update intel_watermark with SKL support
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 2/7] tools/intel_watermark: Print linetime wms in usec Ville Syrjala
@ 2017-09-15 17:57 ` Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 4/7] tools/intel_watermark: Eliminate pointless %s in printf() Ville Syrjala
` (5 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2017-09-15 17:57 UTC (permalink / raw)
To: intel-gfx
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Added support to print SKL watermark and DDB registers.
v2: Printed raw register data, renamed planes and combined two printf()'s
(Ville)
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
[vsyrjala: make it build, fix indentation, etc.]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 148 +++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 147 insertions(+), 1 deletion(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index f73e9a89edab..c08379d66e51 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -120,6 +120,11 @@ static const char *endis(bool enabled)
return enabled ? "enabled" : "disabled";
}
+static char endis_ast(bool enabled)
+{
+ return enabled ? '*' : ' ';
+}
+
static int is_gen7_plus(uint32_t d)
{
return !(IS_GEN5(d) || IS_GEN6(d));
@@ -130,6 +135,145 @@ static int is_hsw_plus(uint32_t d)
return !(IS_GEN5(d) || IS_GEN6(d) || IS_IVYBRIDGE(d));
}
+
+static void skl_wm_dump(void)
+{
+ int pipe, plane, level;
+ int num_pipes = 3;
+ int num_planes = 5;
+ int num_levels = 8;
+ uint32_t base_addr = 0x70000, addr, wm_offset;
+ uint32_t wm[num_levels][num_pipes][num_planes];
+ uint32_t wm_trans[num_pipes][num_planes];
+ uint32_t buf_cfg[num_pipes][num_planes];
+ char reg_name[20];
+
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
+
+ for (pipe = 0; pipe < num_pipes; pipe++) {
+ for (plane = 0; plane < num_planes; plane++) {
+ addr = base_addr + pipe * 0x1000 + plane * 0x100;
+
+ wm_trans[pipe][plane] = read_reg(addr + 0x00168);
+ buf_cfg[pipe][plane] = read_reg(addr + 0x0017C);
+ for (level = 0; level < num_levels; level++) {
+ wm_offset = addr + 0x00140 + level * 0x4;
+ wm[level][pipe][plane] = read_reg(wm_offset);
+ }
+ }
+ }
+
+ for (plane = 0; plane < num_planes; plane++) {
+ for (level = 0; level < num_levels; level++) {
+ for (pipe = 0; pipe < num_pipes; pipe++) {
+ if (plane == 0)
+ snprintf(reg_name, sizeof(reg_name), "%s_WM_%c_%1d","CUR",
+ pipe_name(pipe), level);
+ else
+ snprintf(reg_name, sizeof(reg_name), "%s_WM_%1d_%c_%1d","PLANE",
+ plane, pipe_name(pipe), level);
+
+ printf("%-19s %8x\t\t" , reg_name, wm[level][pipe][plane]);
+ }
+ printf("\n");
+ }
+ printf("\n");
+ }
+
+ for (plane = 0; plane < num_planes; plane++) {
+ for (pipe = 0; pipe < num_pipes; pipe++) {
+ if (plane == 0)
+ snprintf(reg_name, sizeof(reg_name), "%s_WM_TRANS_%c", "CUR",
+ pipe_name(pipe));
+ else
+ snprintf(reg_name, sizeof(reg_name), "%s_WM_TRANS_%1d_%c", "PLANE",
+ plane, pipe_name(pipe));
+
+ printf("%-19s %8x\t\t", reg_name, wm_trans[pipe][plane]);
+ }
+ printf("\n");
+ }
+ printf("\n");
+
+ for (plane = 0; plane < num_planes; plane++) {
+ for (pipe = 0; pipe < num_pipes; pipe++) {
+ if (plane == 0)
+ snprintf(reg_name, sizeof(reg_name), "%s_BUF_CFG_%c", "CUR",
+ pipe_name(pipe));
+ else
+ snprintf(reg_name, sizeof(reg_name), "%s_BUF_CFG_%1d_%c", "PLANE",
+ plane, pipe_name(pipe));
+
+ printf("%-19s %8x\t\t", reg_name, buf_cfg[pipe][plane]);
+ }
+ printf("\n");
+ }
+ printf("\n");
+
+ for (pipe = 0; pipe < num_pipes; pipe++) {
+ uint32_t start, end, size;
+ uint32_t lines, blocks, enable;
+
+ printf("PIPE_%c\n", pipe_name(pipe));
+ printf("LEVEL CURSOR PLANE_1 PLANE_2 PLANE_3 PLANE_4\n");
+ for (level = 0; level < num_levels; level++) {
+ printf("%5d ", level);
+ for (plane = 0; plane < num_planes; plane++) {
+ blocks = REG_DECODE1(wm[level][pipe][plane], 0, 9);
+ lines = REG_DECODE1(wm[level][pipe][plane], 14, 5);
+ enable = REG_DECODE1(wm[level][pipe][plane], 31, 1);
+
+ printf("%3d%c", blocks, endis_ast(enable));
+ if (!REG_DECODE1(wm[level][pipe][plane], 30, 1))
+ printf("(%2d) ", lines);
+ else
+ printf("(--) ");
+ }
+ printf("\n");
+ }
+
+ printf("TRANS: ");
+ for (plane = 0; plane < num_planes; plane++) {
+ blocks = REG_DECODE1(wm_trans[pipe][plane], 0, 9);
+ lines = REG_DECODE1(wm_trans[pipe][plane], 14, 5);
+ enable = REG_DECODE1(wm_trans[pipe][plane], 31, 1);
+
+ printf("%3d%c", blocks, endis_ast(enable));
+ if (!REG_DECODE1(wm_trans[pipe][plane], 30, 1))
+ printf("(%2d) ", lines);
+ else
+ printf("(--) ");
+ }
+
+ printf("\nDDB allocation:");
+
+ printf("\nstart ");
+ for (plane = 0; plane < num_planes; plane++) {
+ start = REG_DECODE1(buf_cfg[pipe][plane], 0, 10);
+ printf("%7d ", start);
+ }
+
+ printf("\nend ");
+ for (plane = 0; plane < num_planes; plane++) {
+ end = REG_DECODE1(buf_cfg[pipe][plane], 16, 10);
+ printf("%7d ", end);
+ }
+
+ printf("\nsize ");
+ for (plane = 0; plane < num_planes; plane++) {
+ start = REG_DECODE1(buf_cfg[pipe][plane], 0, 10);
+ end = REG_DECODE1(buf_cfg[pipe][plane], 16, 10);
+ size = end - start + 1;
+ printf("%7d ", (end == 0 && size == 1) ? 0 : size);
+ }
+
+ printf("\n\n\n");
+ }
+
+ printf("* plane watermark enabled\n");
+ printf("(x) line watermark if enabled\n");
+}
+
static void ilk_wm_dump(void)
{
int i;
@@ -905,7 +1049,9 @@ int main(int argc, char *argv[])
/* Just to make sure we open the right debugfs files */
drm_fd = __drm_open_driver(DRIVER_INTEL);
- if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
+ if (IS_GEN9(devid)) {
+ skl_wm_dump();
+ } else if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
display_base = 0x180000;
vlv_wm_dump();
} else if (HAS_PCH_SPLIT(devid)) {
--
2.13.5
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH i-g-t 4/7] tools/intel_watermark: Eliminate pointless %s in printf()
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 2/7] tools/intel_watermark: Print linetime wms in usec Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 3/7] tools/intel_watermark: Update intel_watermark with SKL support Ville Syrjala
@ 2017-09-15 17:57 ` Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 5/7] tools/intel_watermark: Polish SKL+ register dump output a bit Ville Syrjala
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2017-09-15 17:57 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index c08379d66e51..4f18e8df1810 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -167,10 +167,10 @@ static void skl_wm_dump(void)
for (level = 0; level < num_levels; level++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
if (plane == 0)
- snprintf(reg_name, sizeof(reg_name), "%s_WM_%c_%1d","CUR",
+ snprintf(reg_name, sizeof(reg_name), "CUR_WM_%c_%1d",
pipe_name(pipe), level);
else
- snprintf(reg_name, sizeof(reg_name), "%s_WM_%1d_%c_%1d","PLANE",
+ snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%c_%1d",
plane, pipe_name(pipe), level);
printf("%-19s %8x\t\t" , reg_name, wm[level][pipe][plane]);
@@ -183,10 +183,10 @@ static void skl_wm_dump(void)
for (plane = 0; plane < num_planes; plane++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
if (plane == 0)
- snprintf(reg_name, sizeof(reg_name), "%s_WM_TRANS_%c", "CUR",
+ snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS_%c",
pipe_name(pipe));
else
- snprintf(reg_name, sizeof(reg_name), "%s_WM_TRANS_%1d_%c", "PLANE",
+ snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d_%c",
plane, pipe_name(pipe));
printf("%-19s %8x\t\t", reg_name, wm_trans[pipe][plane]);
@@ -198,10 +198,10 @@ static void skl_wm_dump(void)
for (plane = 0; plane < num_planes; plane++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
if (plane == 0)
- snprintf(reg_name, sizeof(reg_name), "%s_BUF_CFG_%c", "CUR",
+ snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG_%c",
pipe_name(pipe));
else
- snprintf(reg_name, sizeof(reg_name), "%s_BUF_CFG_%1d_%c", "PLANE",
+ snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d_%c",
plane, pipe_name(pipe));
printf("%-19s %8x\t\t", reg_name, buf_cfg[pipe][plane]);
--
2.13.5
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH i-g-t 5/7] tools/intel_watermark: Polish SKL+ register dump output a bit
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
` (2 preceding siblings ...)
2017-09-15 17:57 ` [PATCH i-g-t 4/7] tools/intel_watermark: Eliminate pointless %s in printf() Ville Syrjala
@ 2017-09-15 17:57 ` Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 6/7] tools/intel_watermark: Dump WM_LINETIME on SKL+ Ville Syrjala
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2017-09-15 17:57 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Print hex numbers with "0x" prefix, and make the output a bit more
compact.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 4f18e8df1810..24ecaa780be5 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -173,7 +173,7 @@ static void skl_wm_dump(void)
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%c_%1d",
plane, pipe_name(pipe), level);
- printf("%-19s %8x\t\t" , reg_name, wm[level][pipe][plane]);
+ printf("%-18s 0x%08x\t" , reg_name, wm[level][pipe][plane]);
}
printf("\n");
}
@@ -189,7 +189,7 @@ static void skl_wm_dump(void)
snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d_%c",
plane, pipe_name(pipe));
- printf("%-19s %8x\t\t", reg_name, wm_trans[pipe][plane]);
+ printf("%-18s 0x%08x\t", reg_name, wm_trans[pipe][plane]);
}
printf("\n");
}
@@ -204,7 +204,7 @@ static void skl_wm_dump(void)
snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d_%c",
plane, pipe_name(pipe));
- printf("%-19s %8x\t\t", reg_name, buf_cfg[pipe][plane]);
+ printf("%-18s 0x%08x\t", reg_name, buf_cfg[pipe][plane]);
}
printf("\n");
}
--
2.13.5
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH i-g-t 6/7] tools/intel_watermark: Dump WM_LINETIME on SKL+
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
` (3 preceding siblings ...)
2017-09-15 17:57 ` [PATCH i-g-t 5/7] tools/intel_watermark: Polish SKL+ register dump output a bit Ville Syrjala
@ 2017-09-15 17:57 ` Ville Syrjala
2017-09-15 17:57 ` [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes " Ville Syrjala
` (2 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2017-09-15 17:57 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 24ecaa780be5..ce920192295b 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -146,11 +146,14 @@ static void skl_wm_dump(void)
uint32_t wm[num_levels][num_pipes][num_planes];
uint32_t wm_trans[num_pipes][num_planes];
uint32_t buf_cfg[num_pipes][num_planes];
+ uint32_t wm_linetime[num_pipes];
char reg_name[20];
intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
for (pipe = 0; pipe < num_pipes; pipe++) {
+ wm_linetime[pipe] = read_reg(0x45270 + pipe * 0x4);
+
for (plane = 0; plane < num_planes; plane++) {
addr = base_addr + pipe * 0x1000 + plane * 0x100;
@@ -163,6 +166,13 @@ static void skl_wm_dump(void)
}
}
+ for (pipe = 0; pipe < num_pipes; pipe++) {
+ snprintf(reg_name, sizeof(reg_name), "WM_LINETIME_%c",
+ pipe_name(pipe));
+ printf("%-18s 0x%08x\t", reg_name, wm_linetime[pipe]);
+ }
+ printf("\n\n");
+
for (plane = 0; plane < num_planes; plane++) {
for (level = 0; level < num_levels; level++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
@@ -213,8 +223,13 @@ static void skl_wm_dump(void)
for (pipe = 0; pipe < num_pipes; pipe++) {
uint32_t start, end, size;
uint32_t lines, blocks, enable;
+ uint32_t linetime;
printf("PIPE_%c\n", pipe_name(pipe));
+
+ linetime = REG_DECODE1(wm_linetime[pipe], 0, 9);
+ printf("LINETIME: %d (%.3f usec)\n", linetime, linetime* 0.125f);
+
printf("LEVEL CURSOR PLANE_1 PLANE_2 PLANE_3 PLANE_4\n");
for (level = 0; level < num_levels; level++) {
printf("%5d ", level);
--
2.13.5
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes on SKL+
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
` (4 preceding siblings ...)
2017-09-15 17:57 ` [PATCH i-g-t 6/7] tools/intel_watermark: Dump WM_LINETIME on SKL+ Ville Syrjala
@ 2017-09-15 17:57 ` Ville Syrjala
2017-11-21 0:50 ` Pandiyan, Dhinakaran
2017-09-15 18:26 ` ✓ Fi.CI.BAT: success for series starting with [1/7] tools/intel_watermark: Don't require master Patchwork
2017-09-15 20:36 ` ✗ Fi.CI.IGT: failure " Patchwork
7 siblings, 1 reply; 11+ messages in thread
From: Ville Syrjala @ 2017-09-15 17:57 UTC (permalink / raw)
To: intel-gfx
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Having registers for nonexistent planes in the dumpo might end up being
rather confusing. Try to only include real planes.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
tools/intel_watermark.c | 40 +++++++++++++++++++++++++++++++++-------
1 file changed, 33 insertions(+), 7 deletions(-)
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index ce920192295b..d81e95771efb 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -135,23 +135,42 @@ static int is_hsw_plus(uint32_t d)
return !(IS_GEN5(d) || IS_GEN6(d) || IS_IVYBRIDGE(d));
}
+static int skl_num_planes(uint32_t d, int pipe)
+{
+ if (IS_GEN10(d) || IS_GEMINILAKE(d))
+ return 5;
+ else if (IS_BROXTON(d))
+ return pipe == 2 ? 4 : 5;
+ else
+ return 4;
+}
+
+static int skl_max_planes(uint32_t d)
+{
+ if (IS_GEN10(d) || IS_GEMINILAKE(d) || IS_BROXTON(d))
+ return 5;
+ else
+ return 4;
+}
static void skl_wm_dump(void)
{
int pipe, plane, level;
int num_pipes = 3;
- int num_planes = 5;
+ int max_planes = skl_max_planes(devid);
int num_levels = 8;
uint32_t base_addr = 0x70000, addr, wm_offset;
- uint32_t wm[num_levels][num_pipes][num_planes];
- uint32_t wm_trans[num_pipes][num_planes];
- uint32_t buf_cfg[num_pipes][num_planes];
+ uint32_t wm[num_levels][num_pipes][max_planes];
+ uint32_t wm_trans[num_pipes][max_planes];
+ uint32_t buf_cfg[num_pipes][max_planes];
uint32_t wm_linetime[num_pipes];
char reg_name[20];
intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
for (pipe = 0; pipe < num_pipes; pipe++) {
+ int num_planes = skl_num_planes(devid, pipe);
+
wm_linetime[pipe] = read_reg(0x45270 + pipe * 0x4);
for (plane = 0; plane < num_planes; plane++) {
@@ -173,9 +192,11 @@ static void skl_wm_dump(void)
}
printf("\n\n");
- for (plane = 0; plane < num_planes; plane++) {
+ for (plane = 0; plane < max_planes; plane++) {
for (level = 0; level < num_levels; level++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
+ if (plane >= skl_num_planes(devid, pipe))
+ break;
if (plane == 0)
snprintf(reg_name, sizeof(reg_name), "CUR_WM_%c_%1d",
pipe_name(pipe), level);
@@ -190,8 +211,10 @@ static void skl_wm_dump(void)
printf("\n");
}
- for (plane = 0; plane < num_planes; plane++) {
+ for (plane = 0; plane < max_planes; plane++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
+ if (plane >= skl_num_planes(devid, pipe))
+ break;
if (plane == 0)
snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS_%c",
pipe_name(pipe));
@@ -205,8 +228,10 @@ static void skl_wm_dump(void)
}
printf("\n");
- for (plane = 0; plane < num_planes; plane++) {
+ for (plane = 0; plane < max_planes; plane++) {
for (pipe = 0; pipe < num_pipes; pipe++) {
+ if (plane >= skl_num_planes(devid, pipe))
+ break;
if (plane == 0)
snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG_%c",
pipe_name(pipe));
@@ -224,6 +249,7 @@ static void skl_wm_dump(void)
uint32_t start, end, size;
uint32_t lines, blocks, enable;
uint32_t linetime;
+ int num_planes = skl_num_planes(devid, pipe);
printf("PIPE_%c\n", pipe_name(pipe));
--
2.13.5
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^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes on SKL+
2017-09-15 17:57 ` [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes " Ville Syrjala
@ 2017-11-21 0:50 ` Pandiyan, Dhinakaran
2017-11-21 14:36 ` Ville Syrjälä
0 siblings, 1 reply; 11+ messages in thread
From: Pandiyan, Dhinakaran @ 2017-11-21 0:50 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com; +Cc: intel-gfx@lists.freedesktop.org
On Fri, 2017-09-15 at 20:57 +0300, Ville Syrjala wrote:
> From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
This should be yours :)
>
> Having registers for nonexistent planes in the dumpo might end up being
> rather confusing. Try to only include real planes.
>
Thanks for resubmitting 3/7 and the cleanups.
One nit, this patch leaves a hard-coded line that looks ugly on SKL.
"printf("LEVEL CURSOR PLANE_1 PLANE_2 PLANE_3 PLANE_4\n");"
Btw, I notice a possibly spurious watermark level for plane 3, pipe A on
my SKL even when the display is off.
LINETIME: 0 (0.000 usec)
LEVEL CURSOR PLANE_1 PLANE_2 PLANE_3 PLANE_4
0 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
1 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
2 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
3 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
4 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
5 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
6 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
7 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
TRANS: 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
The series lgtm,
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> for all
patches except 3/7, which I've partially authored.
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_watermark.c | 40 +++++++++++++++++++++++++++++++++-------
> 1 file changed, 33 insertions(+), 7 deletions(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index ce920192295b..d81e95771efb 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -135,23 +135,42 @@ static int is_hsw_plus(uint32_t d)
> return !(IS_GEN5(d) || IS_GEN6(d) || IS_IVYBRIDGE(d));
> }
>
> +static int skl_num_planes(uint32_t d, int pipe)
> +{
> + if (IS_GEN10(d) || IS_GEMINILAKE(d))
> + return 5;
> + else if (IS_BROXTON(d))
> + return pipe == 2 ? 4 : 5;
> + else
> + return 4;
> +}
> +
> +static int skl_max_planes(uint32_t d)
> +{
> + if (IS_GEN10(d) || IS_GEMINILAKE(d) || IS_BROXTON(d))
> + return 5;
> + else
> + return 4;
> +}
>
> static void skl_wm_dump(void)
> {
> int pipe, plane, level;
> int num_pipes = 3;
> - int num_planes = 5;
> + int max_planes = skl_max_planes(devid);
> int num_levels = 8;
> uint32_t base_addr = 0x70000, addr, wm_offset;
> - uint32_t wm[num_levels][num_pipes][num_planes];
> - uint32_t wm_trans[num_pipes][num_planes];
> - uint32_t buf_cfg[num_pipes][num_planes];
> + uint32_t wm[num_levels][num_pipes][max_planes];
> + uint32_t wm_trans[num_pipes][max_planes];
> + uint32_t buf_cfg[num_pipes][max_planes];
> uint32_t wm_linetime[num_pipes];
> char reg_name[20];
>
> intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
>
> for (pipe = 0; pipe < num_pipes; pipe++) {
> + int num_planes = skl_num_planes(devid, pipe);
> +
> wm_linetime[pipe] = read_reg(0x45270 + pipe * 0x4);
>
> for (plane = 0; plane < num_planes; plane++) {
> @@ -173,9 +192,11 @@ static void skl_wm_dump(void)
> }
> printf("\n\n");
>
> - for (plane = 0; plane < num_planes; plane++) {
> + for (plane = 0; plane < max_planes; plane++) {
> for (level = 0; level < num_levels; level++) {
> for (pipe = 0; pipe < num_pipes; pipe++) {
> + if (plane >= skl_num_planes(devid, pipe))
> + break;
> if (plane == 0)
> snprintf(reg_name, sizeof(reg_name), "CUR_WM_%c_%1d",
> pipe_name(pipe), level);
> @@ -190,8 +211,10 @@ static void skl_wm_dump(void)
> printf("\n");
> }
>
> - for (plane = 0; plane < num_planes; plane++) {
> + for (plane = 0; plane < max_planes; plane++) {
> for (pipe = 0; pipe < num_pipes; pipe++) {
> + if (plane >= skl_num_planes(devid, pipe))
> + break;
> if (plane == 0)
> snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS_%c",
> pipe_name(pipe));
> @@ -205,8 +228,10 @@ static void skl_wm_dump(void)
> }
> printf("\n");
>
> - for (plane = 0; plane < num_planes; plane++) {
> + for (plane = 0; plane < max_planes; plane++) {
> for (pipe = 0; pipe < num_pipes; pipe++) {
> + if (plane >= skl_num_planes(devid, pipe))
> + break;
> if (plane == 0)
> snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG_%c",
> pipe_name(pipe));
> @@ -224,6 +249,7 @@ static void skl_wm_dump(void)
> uint32_t start, end, size;
> uint32_t lines, blocks, enable;
> uint32_t linetime;
> + int num_planes = skl_num_planes(devid, pipe);
>
> printf("PIPE_%c\n", pipe_name(pipe));
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes on SKL+
2017-11-21 0:50 ` Pandiyan, Dhinakaran
@ 2017-11-21 14:36 ` Ville Syrjälä
0 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjälä @ 2017-11-21 14:36 UTC (permalink / raw)
To: Pandiyan, Dhinakaran; +Cc: intel-gfx@lists.freedesktop.org
On Tue, Nov 21, 2017 at 12:50:51AM +0000, Pandiyan, Dhinakaran wrote:
>
>
>
> On Fri, 2017-09-15 at 20:57 +0300, Ville Syrjala wrote:
> > From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>
> This should be yours :)
>
> >
> > Having registers for nonexistent planes in the dumpo might end up being
> > rather confusing. Try to only include real planes.
> >
>
>
> Thanks for resubmitting 3/7 and the cleanups.
>
> One nit, this patch leaves a hard-coded line that looks ugly on SKL.
> "printf("LEVEL CURSOR PLANE_1 PLANE_2 PLANE_3 PLANE_4\n");"
The PLANE_4 part? Yeah, I guess we could tweak it a bit. But maybe leave
that for the day when we have anyway support more planes in the tool.
That's assuming the watermark registers aren't going to change
significantly when that happens.
>
>
> Btw, I notice a possibly spurious watermark level for plane 3, pipe A on
> my SKL even when the display is off.
We don't actually use plane 3 on SKL. It's aliased with the cursor
and we only ever use it in the cursor mode. And I guess we just
leave the default watermarks in the registers for plane 3.
>
> LINETIME: 0 (0.000 usec)
> LEVEL CURSOR PLANE_1 PLANE_2 PLANE_3 PLANE_4
> 0 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 1 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 2 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 3 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 4 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 5 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 6 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> 7 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
> TRANS: 0 ( 0) 0 ( 0) 0 ( 0) 7 ( 1)
>
>
> The series lgtm,
> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> for all
> patches except 3/7, which I've partially authored.
Thanks. Pushed to master.
>
>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > tools/intel_watermark.c | 40 +++++++++++++++++++++++++++++++++-------
> > 1 file changed, 33 insertions(+), 7 deletions(-)
> >
> > diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> > index ce920192295b..d81e95771efb 100644
> > --- a/tools/intel_watermark.c
> > +++ b/tools/intel_watermark.c
> > @@ -135,23 +135,42 @@ static int is_hsw_plus(uint32_t d)
> > return !(IS_GEN5(d) || IS_GEN6(d) || IS_IVYBRIDGE(d));
> > }
> >
> > +static int skl_num_planes(uint32_t d, int pipe)
> > +{
> > + if (IS_GEN10(d) || IS_GEMINILAKE(d))
> > + return 5;
> > + else if (IS_BROXTON(d))
> > + return pipe == 2 ? 4 : 5;
> > + else
> > + return 4;
> > +}
> > +
> > +static int skl_max_planes(uint32_t d)
> > +{
> > + if (IS_GEN10(d) || IS_GEMINILAKE(d) || IS_BROXTON(d))
> > + return 5;
> > + else
> > + return 4;
> > +}
> >
> > static void skl_wm_dump(void)
> > {
> > int pipe, plane, level;
> > int num_pipes = 3;
> > - int num_planes = 5;
> > + int max_planes = skl_max_planes(devid);
> > int num_levels = 8;
> > uint32_t base_addr = 0x70000, addr, wm_offset;
> > - uint32_t wm[num_levels][num_pipes][num_planes];
> > - uint32_t wm_trans[num_pipes][num_planes];
> > - uint32_t buf_cfg[num_pipes][num_planes];
> > + uint32_t wm[num_levels][num_pipes][max_planes];
> > + uint32_t wm_trans[num_pipes][max_planes];
> > + uint32_t buf_cfg[num_pipes][max_planes];
> > uint32_t wm_linetime[num_pipes];
> > char reg_name[20];
> >
> > intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
> >
> > for (pipe = 0; pipe < num_pipes; pipe++) {
> > + int num_planes = skl_num_planes(devid, pipe);
> > +
> > wm_linetime[pipe] = read_reg(0x45270 + pipe * 0x4);
> >
> > for (plane = 0; plane < num_planes; plane++) {
> > @@ -173,9 +192,11 @@ static void skl_wm_dump(void)
> > }
> > printf("\n\n");
> >
> > - for (plane = 0; plane < num_planes; plane++) {
> > + for (plane = 0; plane < max_planes; plane++) {
> > for (level = 0; level < num_levels; level++) {
> > for (pipe = 0; pipe < num_pipes; pipe++) {
> > + if (plane >= skl_num_planes(devid, pipe))
> > + break;
> > if (plane == 0)
> > snprintf(reg_name, sizeof(reg_name), "CUR_WM_%c_%1d",
> > pipe_name(pipe), level);
> > @@ -190,8 +211,10 @@ static void skl_wm_dump(void)
> > printf("\n");
> > }
> >
> > - for (plane = 0; plane < num_planes; plane++) {
> > + for (plane = 0; plane < max_planes; plane++) {
> > for (pipe = 0; pipe < num_pipes; pipe++) {
> > + if (plane >= skl_num_planes(devid, pipe))
> > + break;
> > if (plane == 0)
> > snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS_%c",
> > pipe_name(pipe));
> > @@ -205,8 +228,10 @@ static void skl_wm_dump(void)
> > }
> > printf("\n");
> >
> > - for (plane = 0; plane < num_planes; plane++) {
> > + for (plane = 0; plane < max_planes; plane++) {
> > for (pipe = 0; pipe < num_pipes; pipe++) {
> > + if (plane >= skl_num_planes(devid, pipe))
> > + break;
> > if (plane == 0)
> > snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG_%c",
> > pipe_name(pipe));
> > @@ -224,6 +249,7 @@ static void skl_wm_dump(void)
> > uint32_t start, end, size;
> > uint32_t lines, blocks, enable;
> > uint32_t linetime;
> > + int num_planes = skl_num_planes(devid, pipe);
> >
> > printf("PIPE_%c\n", pipe_name(pipe));
> >
>
>
>
>
>
>
>
--
Ville Syrjälä
Intel OTC
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^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/7] tools/intel_watermark: Don't require master
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
` (5 preceding siblings ...)
2017-09-15 17:57 ` [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes " Ville Syrjala
@ 2017-09-15 18:26 ` Patchwork
2017-09-15 20:36 ` ✗ Fi.CI.IGT: failure " Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2017-09-15 18:26 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/7] tools/intel_watermark: Don't require master
URL : https://patchwork.freedesktop.org/series/30442/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
93f72b23156589964b87bb9ca7c94c104976303c meson: Process intel_aubdump.in into intel_aubdump
with latest DRM-Tip kernel build CI_DRM_3094
9adc9e93d624 drm-tip: 2017y-09m-15d-11h-44m-46s UTC integration manifest
Test chamelium:
Subgroup dp-crc-fast:
pass -> DMESG-FAIL (fi-kbl-7500u) fdo#102514
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail -> PASS (fi-snb-2600) fdo#100215
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (fi-cfl-s) fdo#102294
fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#102294 https://bugs.freedesktop.org/show_bug.cgi?id=102294
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:445s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:456s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:383s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:537s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:271s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:515s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:509s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:500s
fi-cfl-s total:289 pass:222 dwarn:35 dfail:0 fail:0 skip:32 time:556s
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:424s
fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:595s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:435s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:409s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:442s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:490s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:469s
fi-kbl-7500u total:289 pass:263 dwarn:1 dfail:1 fail:0 skip:24 time:483s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:579s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:590s
fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:549s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:465s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:527s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:499s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:465s
fi-skl-x1585l total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:491s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:579s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:1 skip:39 time:426s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_192/
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^ permalink raw reply [flat|nested] 11+ messages in thread* ✗ Fi.CI.IGT: failure for series starting with [1/7] tools/intel_watermark: Don't require master
2017-09-15 17:57 [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master Ville Syrjala
` (6 preceding siblings ...)
2017-09-15 18:26 ` ✓ Fi.CI.BAT: success for series starting with [1/7] tools/intel_watermark: Don't require master Patchwork
@ 2017-09-15 20:36 ` Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2017-09-15 20:36 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/7] tools/intel_watermark: Don't require master
URL : https://patchwork.freedesktop.org/series/30442/
State : failure
== Summary ==
Test gem_flink_race:
Subgroup flink_close:
pass -> FAIL (shard-hsw) fdo#102655
Test kms_cursor_legacy:
Subgroup cursorA-vs-flipA-atomic-transitions:
pass -> FAIL (shard-hsw)
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-hsw) fdo#99912
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
fdo#102655 https://bugs.freedesktop.org/show_bug.cgi?id=102655
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
shard-hsw total:2267 pass:1216 dwarn:0 dfail:0 fail:13 skip:1038 time:9213s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_192/shards.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread