* [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header
@ 2017-12-20 20:55 Lucas De Marchi
2017-12-20 21:13 ` ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header (rev3) Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Lucas De Marchi @ 2017-12-20 20:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
Synchronize with kernel header as of
c99d7832dcd7 ("drm/i915/cfl: Adding more Coffee Lake PCI IDs.")
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
lib/i915_pciids.h | 28 ++++++++++++++++++++++------
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index c65e4489..5db0458d 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -373,29 +373,45 @@
/* CFL S */
#define INTEL_CFL_S_GT1_IDS(info) \
INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
- INTEL_VGA_DEVICE(0x3E93, info) /* SRV GT1 */
+ INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
+ INTEL_VGA_DEVICE(0x3E99, info) /* SRV GT1 */
#define INTEL_CFL_S_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
- INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */
+ INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
+ INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
/* CFL H */
#define INTEL_CFL_H_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
-/* CFL U */
+/* CFL U GT1 */
+#define INTEL_CFL_U_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x3EA1, info), \
+ INTEL_VGA_DEVICE(0x3EA4, info)
+
+/* CFL U GT2 */
+#define INTEL_CFL_U_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x3EA0, info), \
+ INTEL_VGA_DEVICE(0x3EA3, info), \
+ INTEL_VGA_DEVICE(0x3EA9, info)
+
+/* CFL U GT3 */
#define INTEL_CFL_U_GT3_IDS(info) \
+ INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
+ INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
- INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \
- INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */
+ INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */
-#define INTEL_CFL_IDS(info) \
+#define INTEL_CFL_IDS(info) \
INTEL_CFL_S_GT1_IDS(info), \
INTEL_CFL_S_GT2_IDS(info), \
INTEL_CFL_H_GT2_IDS(info), \
+ INTEL_CFL_U_GT1_IDS(info), \
+ INTEL_CFL_U_GT2_IDS(info), \
INTEL_CFL_U_GT3_IDS(info)
/* CNL U 2+2 */
--
2.14.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header (rev3)
2017-12-20 20:55 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi
@ 2017-12-20 21:13 ` Patchwork
2017-12-20 22:34 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-12-20 23:21 ` [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Rodrigo Vivi
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-12-20 21:13 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
== Series Details ==
Series: lib/i915_pciids.h: synchronize with kernel header (rev3)
URL : https://patchwork.freedesktop.org/series/35121/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
851c417b6b7a4ea28af67cfad116c8b7dc1d263e igt/kms_frontbuffer_tracking: Make assert(false) more informative
with latest DRM-Tip kernel build CI_DRM_3558
16c40c33a5ea drm-tip: 2017y-12m-20d-19h-24m-38s UTC integration manifest
No testlist changes.
Test debugfs_test:
Subgroup read_all_entries:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass -> DMESG-WARN (fi-kbl-r) fdo#104172 +1
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:434s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:441s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:384s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:497s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:277s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:497s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:491s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:480s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:468s
fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45
fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:266s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:533s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:408s
fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:414s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:389s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:475s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:433s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:475s
fi-kbl-7560u total:288 pass:268 dwarn:1 dfail:0 fail:0 skip:19 time:521s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:468s
fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:526s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:578s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:445s
fi-skl-6600u total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:528s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:548s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:507s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:498s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:448s
fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:416s
Blacklisted hosts:
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:596s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_715/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* ✗ Fi.CI.IGT: warning for lib/i915_pciids.h: synchronize with kernel header (rev3)
2017-12-20 20:55 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi
2017-12-20 21:13 ` ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header (rev3) Patchwork
@ 2017-12-20 22:34 ` Patchwork
2017-12-20 23:21 ` [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Rodrigo Vivi
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-12-20 22:34 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
== Series Details ==
Series: lib/i915_pciids.h: synchronize with kernel header (rev3)
URL : https://patchwork.freedesktop.org/series/35121/
State : warning
== Summary ==
Test kms_flip:
Subgroup vblank-vs-suspend-interruptible:
pass -> DMESG-WARN (shard-snb) fdo#100368
Subgroup wf_vblank-vs-modeset:
dmesg-warn -> PASS (shard-hsw) fdo#102614
Test kms_universal_plane:
Subgroup universal-plane-pipe-c-sanity:
skip -> PASS (shard-hsw)
Test gem_softpin:
Subgroup noreloc-s3:
skip -> PASS (shard-hsw) fdo#103540
Test drv_suspend:
Subgroup sysfs-reader:
skip -> PASS (shard-snb)
pass -> SKIP (shard-hsw)
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
shard-hsw total:2636 pass:1495 dwarn:1 dfail:0 fail:10 skip:1130 time:9178s
shard-snb total:2712 pass:1308 dwarn:2 dfail:0 fail:11 skip:1391 time:8097s
Blacklisted hosts:
shard-apl total:2690 pass:1665 dwarn:1 dfail:0 fail:22 skip:1001 time:13474s
shard-kbl total:2697 pass:1776 dwarn:20 dfail:0 fail:24 skip:875 time:9973s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_715/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header
2017-12-20 20:55 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi
2017-12-20 21:13 ` ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header (rev3) Patchwork
2017-12-20 22:34 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2017-12-20 23:21 ` Rodrigo Vivi
2017-12-20 23:26 ` Rodrigo Vivi
2 siblings, 1 reply; 5+ messages in thread
From: Rodrigo Vivi @ 2017-12-20 23:21 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Wed, Dec 20, 2017 at 08:55:24PM +0000, Lucas De Marchi wrote:
> Synchronize with kernel header as of
> c99d7832dcd7 ("drm/i915/cfl: Adding more Coffee Lake PCI IDs.")
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> lib/i915_pciids.h | 28 ++++++++++++++++++++++------
> 1 file changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index c65e4489..5db0458d 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -373,29 +373,45 @@
> /* CFL S */
> #define INTEL_CFL_S_GT1_IDS(info) \
> INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
> - INTEL_VGA_DEVICE(0x3E93, info) /* SRV GT1 */
> + INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
> + INTEL_VGA_DEVICE(0x3E99, info) /* SRV GT1 */
>
> #define INTEL_CFL_S_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
> INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
> - INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */
> + INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
> + INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
>
> /* CFL H */
> #define INTEL_CFL_H_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
> INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
>
> -/* CFL U */
> +/* CFL U GT1 */
> +#define INTEL_CFL_U_GT1_IDS(info) \
> + INTEL_VGA_DEVICE(0x3EA1, info), \
> + INTEL_VGA_DEVICE(0x3EA4, info)
> +
> +/* CFL U GT2 */
> +#define INTEL_CFL_U_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x3EA0, info), \
> + INTEL_VGA_DEVICE(0x3EA3, info), \
> + INTEL_VGA_DEVICE(0x3EA9, info)
> +
> +/* CFL U GT3 */
> #define INTEL_CFL_U_GT3_IDS(info) \
> + INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
> + INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
> INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
> INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> - INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \
> - INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */
> + INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */
>
> -#define INTEL_CFL_IDS(info) \
> +#define INTEL_CFL_IDS(info) \
> INTEL_CFL_S_GT1_IDS(info), \
> INTEL_CFL_S_GT2_IDS(info), \
> INTEL_CFL_H_GT2_IDS(info), \
> + INTEL_CFL_U_GT1_IDS(info), \
> + INTEL_CFL_U_GT2_IDS(info), \
> INTEL_CFL_U_GT3_IDS(info)
>
> /* CNL U 2+2 */
> --
> 2.14.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header
2017-12-20 23:21 ` [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Rodrigo Vivi
@ 2017-12-20 23:26 ` Rodrigo Vivi
0 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2017-12-20 23:26 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Wed, Dec 20, 2017 at 11:21:28PM +0000, Rodrigo Vivi wrote:
> On Wed, Dec 20, 2017 at 08:55:24PM +0000, Lucas De Marchi wrote:
> > Synchronize with kernel header as of
> > c99d7832dcd7 ("drm/i915/cfl: Adding more Coffee Lake PCI IDs.")
> >
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
And pushed... thanks for the patch!
>
>
> > ---
> > lib/i915_pciids.h | 28 ++++++++++++++++++++++------
> > 1 file changed, 22 insertions(+), 6 deletions(-)
> >
> > diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> > index c65e4489..5db0458d 100644
> > --- a/lib/i915_pciids.h
> > +++ b/lib/i915_pciids.h
> > @@ -373,29 +373,45 @@
> > /* CFL S */
> > #define INTEL_CFL_S_GT1_IDS(info) \
> > INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
> > - INTEL_VGA_DEVICE(0x3E93, info) /* SRV GT1 */
> > + INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
> > + INTEL_VGA_DEVICE(0x3E99, info) /* SRV GT1 */
> >
> > #define INTEL_CFL_S_GT2_IDS(info) \
> > INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
> > INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
> > - INTEL_VGA_DEVICE(0x3E96, info) /* SRV GT2 */
> > + INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
> > + INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
> >
> > /* CFL H */
> > #define INTEL_CFL_H_GT2_IDS(info) \
> > INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
> > INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
> >
> > -/* CFL U */
> > +/* CFL U GT1 */
> > +#define INTEL_CFL_U_GT1_IDS(info) \
> > + INTEL_VGA_DEVICE(0x3EA1, info), \
> > + INTEL_VGA_DEVICE(0x3EA4, info)
> > +
> > +/* CFL U GT2 */
> > +#define INTEL_CFL_U_GT2_IDS(info) \
> > + INTEL_VGA_DEVICE(0x3EA0, info), \
> > + INTEL_VGA_DEVICE(0x3EA3, info), \
> > + INTEL_VGA_DEVICE(0x3EA9, info)
> > +
> > +/* CFL U GT3 */
> > #define INTEL_CFL_U_GT3_IDS(info) \
> > + INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
> > + INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
> > INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
> > INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> > - INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \
> > - INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */
> > + INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */
> >
> > -#define INTEL_CFL_IDS(info) \
> > +#define INTEL_CFL_IDS(info) \
> > INTEL_CFL_S_GT1_IDS(info), \
> > INTEL_CFL_S_GT2_IDS(info), \
> > INTEL_CFL_H_GT2_IDS(info), \
> > + INTEL_CFL_U_GT1_IDS(info), \
> > + INTEL_CFL_U_GT2_IDS(info), \
> > INTEL_CFL_U_GT3_IDS(info)
> >
> > /* CNL U 2+2 */
> > --
> > 2.14.3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-12-20 23:26 UTC | newest]
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2017-12-20 20:55 [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Lucas De Marchi
2017-12-20 21:13 ` ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header (rev3) Patchwork
2017-12-20 22:34 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-12-20 23:21 ` [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header Rodrigo Vivi
2017-12-20 23:26 ` Rodrigo Vivi
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