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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 10/11] drm/i915/cnl: Fix DP max rate for Cannonlake with port F.
Date: Fri, 22 Dec 2017 14:23:25 -0800	[thread overview]
Message-ID: <20171222222326.18562-10-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20171222222326.18562-1-rodrigo.vivi@intel.com>

On CNL SKUs that uses port F,  max DP rate is 8.1G for all
ports when we have the elevated voltage.

v2: Make commit message more generic.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 377a9770bae5..1b80a0ac4fd9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -238,8 +238,9 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
 		source_rates = cnl_rates;
 		size = ARRAY_SIZE(cnl_rates);
 		voltage = I915_READ(CNL_PORT_COMP_DW3) & VOLTAGE_INFO_MASK;
-		if (port == PORT_A || port == PORT_D ||
-		    voltage == VOLTAGE_INFO_0_85V)
+		if (voltage == VOLTAGE_INFO_0_85V ||
+		    (!IS_CNL_WITH_PORT_F(dev_priv) && (port == PORT_A ||
+						       port == PORT_D)))
 			size -= 2;
 	} else if (IS_GEN9_BC(dev_priv)) {
 		source_rates = skl_rates;
-- 
2.13.6

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  parent reply	other threads:[~2017-12-22 22:23 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-22 22:23 [PATCH 01/11] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 02/11] drm/i915/cnl: Add Port F definition Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 03/11] drm/i915/cnl: Add AUX-F support Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 04/11] drm/i915/cnl: Fix _CNL_PORT_TX_DW2_LN0_F definition Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 05/11] drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 06/11] drm/i915/cnl: Add right GMBUS pin number for HDMI on " Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 07/11] drm/i915: For HPD connected port use hpd_pin instead of port Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 08/11] drm/i915/cnl: Add HPD support for Port F Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 09/11] drm/i915/cnl: Enable DDI-F on Cannonlake Rodrigo Vivi
2017-12-22 22:23 ` Rodrigo Vivi [this message]
2017-12-22 22:23 ` [PATCH 11/11] drm/i915/cnl: Don't try to manage Port F power wells on all CNL Rodrigo Vivi
2017-12-22 22:58 ` ✗ Fi.CI.BAT: failure for series starting with [01/11] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Patchwork
2017-12-22 23:06   ` Rodrigo Vivi
  -- strict thread matches above, loose matches on Subject: below --
2017-12-22 23:18 [PATCH 01/11] " Rodrigo Vivi
2017-12-22 23:18 ` [PATCH 10/11] drm/i915/cnl: Fix DP max rate for Cannonlake with port F Rodrigo Vivi

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