From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 04/11] drm/i915/cnl: Fix _CNL_PORT_TX_DW2_LN0_F definition.
Date: Fri, 22 Dec 2017 14:23:19 -0800 [thread overview]
Message-ID: <20171222222326.18562-4-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20171222222326.18562-1-rodrigo.vivi@intel.com>
This was wrong since its introduction on commit '04416108ccea
("drm/i915/cnl: Add registers related to voltage swing sequences.")'
But since no Port F was needed so far we don't need to
propagate fixes back there.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1fd46b63f283..da7c00282bfb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1964,7 +1964,7 @@ enum i915_power_well_id {
#define _CNL_PORT_TX_DW2_LN0_B 0x162648
#define _CNL_PORT_TX_DW2_LN0_C 0x162C48
#define _CNL_PORT_TX_DW2_LN0_D 0x162E48
-#define _CNL_PORT_TX_DW2_LN0_F 0x162A48
+#define _CNL_PORT_TX_DW2_LN0_F 0x162848
#define CNL_PORT_TX_DW2_GRP(port) _MMIO_PORT6(port, \
_CNL_PORT_TX_DW2_GRP_AE, \
_CNL_PORT_TX_DW2_GRP_B, \
--
2.13.6
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next prev parent reply other threads:[~2017-12-22 22:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-22 22:23 [PATCH 01/11] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 02/11] drm/i915/cnl: Add Port F definition Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 03/11] drm/i915/cnl: Add AUX-F support Rodrigo Vivi
2017-12-22 22:23 ` Rodrigo Vivi [this message]
2017-12-22 22:23 ` [PATCH 05/11] drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 06/11] drm/i915/cnl: Add right GMBUS pin number for HDMI on " Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 07/11] drm/i915: For HPD connected port use hpd_pin instead of port Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 08/11] drm/i915/cnl: Add HPD support for Port F Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 09/11] drm/i915/cnl: Enable DDI-F on Cannonlake Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 10/11] drm/i915/cnl: Fix DP max rate for Cannonlake with port F Rodrigo Vivi
2017-12-22 22:23 ` [PATCH 11/11] drm/i915/cnl: Don't try to manage Port F power wells on all CNL Rodrigo Vivi
2017-12-22 22:58 ` ✗ Fi.CI.BAT: failure for series starting with [01/11] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Patchwork
2017-12-22 23:06 ` Rodrigo Vivi
-- strict thread matches above, loose matches on Subject: below --
2017-12-22 23:18 [PATCH 01/11] " Rodrigo Vivi
2017-12-22 23:18 ` [PATCH 04/11] drm/i915/cnl: Fix _CNL_PORT_TX_DW2_LN0_F definition Rodrigo Vivi
2017-12-26 21:28 ` Pandiyan, Dhinakaran
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