* [PATCH i-g-t 1/2] include: bump drm uAPI headers
@ 2018-01-16 16:07 Lionel Landwerlin
2018-01-16 16:07 ` [PATCH i-g-t 2/2] tests: add i915 query tests Lionel Landwerlin
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Lionel Landwerlin @ 2018-01-16 16:07 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
include/drm-uapi/i915_drm.h | 126 ++++++++++++++++++++++++++++++++++++++++++++
lib/igt_perf.h | 7 ---
2 files changed, 126 insertions(+), 7 deletions(-)
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 7f28eea4..80debdf5 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -102,6 +102,46 @@ enum drm_i915_gem_engine_class {
I915_ENGINE_CLASS_INVALID = -1
};
+/**
+ * DOC: perf_events exposed by i915 through /sys/bus/event_sources/drivers/i915
+ *
+ */
+
+enum drm_i915_pmu_engine_sample {
+ I915_SAMPLE_BUSY = 0,
+ I915_SAMPLE_WAIT = 1,
+ I915_SAMPLE_SEMA = 2
+};
+
+#define I915_PMU_SAMPLE_BITS (4)
+#define I915_PMU_SAMPLE_MASK (0xf)
+#define I915_PMU_SAMPLE_INSTANCE_BITS (8)
+#define I915_PMU_CLASS_SHIFT \
+ (I915_PMU_SAMPLE_BITS + I915_PMU_SAMPLE_INSTANCE_BITS)
+
+#define __I915_PMU_ENGINE(class, instance, sample) \
+ ((class) << I915_PMU_CLASS_SHIFT | \
+ (instance) << I915_PMU_SAMPLE_BITS | \
+ (sample))
+
+#define I915_PMU_ENGINE_BUSY(class, instance) \
+ __I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY)
+
+#define I915_PMU_ENGINE_WAIT(class, instance) \
+ __I915_PMU_ENGINE(class, instance, I915_SAMPLE_WAIT)
+
+#define I915_PMU_ENGINE_SEMA(class, instance) \
+ __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
+
+#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
+
+#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
+#define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1)
+#define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2)
+#define I915_PMU_RC6_RESIDENCY __I915_PMU_OTHER(3)
+
+#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY
+
/* Each region is a minimum of 16k, and there are at most 255 of them.
*/
#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
@@ -278,6 +318,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_PERF_OPEN 0x36
#define DRM_I915_PERF_ADD_CONFIG 0x37
#define DRM_I915_PERF_REMOVE_CONFIG 0x38
+#define DRM_I915_QUERY 0x39
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -335,6 +376,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
#define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
#define DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
+#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
@@ -1573,6 +1615,90 @@ struct drm_i915_perf_oa_config {
__u64 flex_regs_ptr;
};
+
+struct drm_i915_query_item {
+ __u64 query_id;
+#define DRM_I915_QUERY_SLICE_INFO 0x01
+#define DRM_I915_QUERY_SUBSLICE_INFO 0x02
+#define DRM_I915_QUERY_EU_INFO 0x03
+
+ /*
+ * When set to zero by userspace, this is filled with the size of the
+ * data to be written at the data_ptr pointer.
+ */
+ __u32 length;
+
+ __u32 flags;
+
+ /*
+ * Data will be written at the location pointed by data_ptr when the
+ * value of length matches the length of the data to be written by the
+ * kernel.
+ */
+ __u64 data_ptr;
+};
+
+struct drm_i915_query {
+ __u32 num_items;
+ __u32 flags;
+
+ /*
+ * This point to an array of num_items drm_i915_query_item structures.
+ */
+ __u64 items_ptr;
+};
+
+#define DRM_I915_BIT(bit) ((__u32)1 << (bit))
+#define DRM_I915_DIV_ROUND_UP(val, div) (((val) + (div) - 1) / (div))
+
+/* Data written by the kernel with query DRM_I915_QUERY_ID_SLICES_INFO :
+ *
+ * data: each bit indicates whether a slice is available (1) or fused off (0).
+ * Use DRM_I915_QUERY_SLICE_AVAILABLE() to query a given slice's
+ * availability.
+ */
+struct drm_i915_query_slice_info {
+ __u32 max_slices;
+
+#define DRM_I915_QUERY_SLICE_AVAILABLE(info, slice) \
+ !!((info)->data[(slice) / 8] & DRM_I915_BIT((slice) % 8))
+ __u8 data[];
+};
+
+/* Data written by the kernel with query DRM_I915_QUERY_ID_SUBSLICES_INFO :
+ *
+ * data: each bit indicates whether a subslice is available (1) or fused off
+ * (0). Use DRM_I915_QUERY_SUBSLICE_AVAILABLE() to query a given
+ * subslice's availability.
+ */
+struct drm_i915_query_subslice_info {
+ __u32 max_slices;
+ __u32 max_subslices;
+
+#define DRM_I915_QUERY_SUBSLICE_AVAILABLE(info, slice, subslice) \
+ !!((info)->data[(slice) * DRM_I915_DIV_ROUND_UP((info)->max_subslices, 8) + \
+ (subslice) / 8] & DRM_I915_BIT((subslice) % 8))
+ __u8 data[];
+};
+
+/* Data written by the kernel with query DRM_I915_QUERY_ID_EUS_INFO :
+ *
+ * data: Each bit indicates whether a subslice is available (1) or fused off
+ * (0). Use DRM_I915_QUERY_EU_AVAILABLE() to query a given EU's
+ * availability.
+ */
+struct drm_i915_query_eu_info {
+ __u32 max_slices;
+ __u32 max_subslices;
+ __u32 max_eus_per_subslice;
+
+#define DRM_I915_QUERY_EU_AVAILABLE(info, slice, subslice, eu) \
+ !!((info)->data[(slice) * DRM_I915_DIV_ROUND_UP((info)->max_eus_per_subslice, 8) * (info)->max_subslices + \
+ (subslice) * DRM_I915_DIV_ROUND_UP((info)->max_eus_per_subslice, 8) + \
+ (eu) / 8] & DRM_I915_BIT((eu) % 8))
+ __u8 data[];
+};
+
#if defined(__cplusplus)
}
#endif
diff --git a/lib/igt_perf.h b/lib/igt_perf.h
index 7b66fc58..105b8cd9 100644
--- a/lib/igt_perf.h
+++ b/lib/igt_perf.h
@@ -31,13 +31,6 @@
#include "igt_gt.h"
-enum drm_i915_pmu_engine_sample {
- I915_SAMPLE_BUSY = 0,
- I915_SAMPLE_WAIT = 1,
- I915_SAMPLE_SEMA = 2,
- I915_ENGINE_SAMPLE_MAX /* non-ABI */
-};
-
#define I915_PMU_SAMPLE_BITS (4)
#define I915_PMU_SAMPLE_MASK (0xf)
#define I915_PMU_SAMPLE_INSTANCE_BITS (8)
--
2.15.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH i-g-t 2/2] tests: add i915 query tests
2018-01-16 16:07 [PATCH i-g-t 1/2] include: bump drm uAPI headers Lionel Landwerlin
@ 2018-01-16 16:07 ` Lionel Landwerlin
2018-01-16 21:34 ` Chris Wilson
2018-01-16 18:32 ` ✓ Fi.CI.BAT: success for series starting with [1/2] include: bump drm uAPI headers Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Lionel Landwerlin @ 2018-01-16 16:07 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
tests/Makefile.sources | 1 +
tests/meson.build | 1 +
tests/query.c | 268 +++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 270 insertions(+)
create mode 100644 tests/query.c
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index e4e06d01..390cc82b 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -227,6 +227,7 @@ TESTS_progs = \
prime_self_import \
prime_udl \
prime_vgem \
+ query \
sw_sync \
syncobj_basic \
syncobj_wait \
diff --git a/tests/meson.build b/tests/meson.build
index 4c4bee1d..70df38f3 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -204,6 +204,7 @@ test_progs = [
'prime_self_import',
'prime_udl',
'prime_vgem',
+ 'query',
'sw_sync',
'syncobj_basic',
'syncobj_wait',
diff --git a/tests/query.c b/tests/query.c
new file mode 100644
index 00000000..cb5aedd4
--- /dev/null
+++ b/tests/query.c
@@ -0,0 +1,268 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+
+IGT_TEST_DESCRIPTION("Testing the query uAPI.");
+
+static bool has_query_supports(int fd)
+{
+ struct drm_i915_query query = {};
+
+ return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0;
+}
+
+static void test_query_garbage(int fd)
+{
+ struct drm_i915_query query;
+ struct drm_i915_query_item items[2];
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = 0xffffffff;
+ do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT);
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = 0;
+ do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT);
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 2;
+ query.items_ptr = (uintptr_t) items;
+ memset(items, 0, sizeof(items));
+ items[0].query_id = 0xffffffff;
+ do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 2;
+ query.items_ptr = (uintptr_t) items;
+ memset(items, 0, sizeof(items));
+ do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 2;
+ query.items_ptr = (uintptr_t) items;
+ memset(items, 0, sizeof(items));
+ items[0].query_id = DRM_I915_QUERY_SLICE_INFO;
+ items[0].length = 0xffffffff;
+ items[1].query_id = DRM_I915_QUERY_SUBSLICE_INFO;
+ do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
+}
+
+static bool query_topology_supported(int fd)
+{
+ struct drm_i915_query query;
+ struct drm_i915_query_item item;
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = (uintptr_t) &item;
+
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_SLICE_INFO;
+
+ return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0;
+}
+
+static void test_query_topology_pre_gen8(int fd)
+{
+ struct drm_i915_query query;
+ struct drm_i915_query_item item;
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = (uintptr_t) &item;
+
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_SLICE_INFO;
+
+ do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, ENODEV);
+}
+
+static void
+test_query_topology_coherent_slice_mask(int fd)
+{
+ struct drm_i915_query query;
+ struct drm_i915_query_item item;
+ struct drm_i915_query_slice_info *slices_info;
+ struct drm_i915_query_subslice_info *subslices_info;
+ drm_i915_getparam_t gp;
+ int slice_mask, subslice_mask;
+ int i, topology_slices, topology_subslices_slice0;
+
+ gp.param = I915_PARAM_SLICE_MASK;
+ gp.value = &slice_mask;
+ do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ gp.param = I915_PARAM_SUBSLICE_MASK;
+ gp.value = &subslice_mask;
+ do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+ igt_debug("slice_mask=0x%x subslice_mask=0x%x\n", slice_mask, subslice_mask);
+
+ /* Slices */
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = (uintptr_t) &item;
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_SLICE_INFO;
+ do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+
+ slices_info = (struct drm_i915_query_slice_info *) calloc(1, item.length);
+
+ item.data_ptr = (uintptr_t) slices_info;
+ do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+
+ topology_slices = 0;
+ for (i = 0; i < slices_info->max_slices; i++) {
+ if (DRM_I915_QUERY_SLICE_AVAILABLE(slices_info, i))
+ topology_slices++;
+ }
+
+ /* These 2 should always match. */
+ igt_assert(__builtin_popcount(slice_mask) == topology_slices);
+
+ free(slices_info);
+
+ /* Subslices */
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = (uintptr_t) &item;
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_SUBSLICE_INFO;
+ do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+
+ subslices_info = (struct drm_i915_query_subslice_info *) calloc(1, item.length);
+
+ item.data_ptr = (uintptr_t) subslices_info;
+ do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+
+ topology_subslices_slice0 = 0;
+ for (i = 0; i < subslices_info->max_subslices; i++) {
+ topology_subslices_slice0 +=
+ __builtin_popcount(
+ DRM_I915_QUERY_SUBSLICE_AVAILABLE(subslices_info, 0, i));
+ }
+
+ /* I915_PARAM_SUBSLICE_INFO returns the value for slice0, we
+ * should match the values for the first slice of the
+ * topology.
+ */
+ igt_assert(__builtin_popcount(subslice_mask) == topology_subslices_slice0);
+
+ free(subslices_info);
+}
+
+static void
+test_query_topology_matches_eu_total(int fd)
+{
+ struct drm_i915_query query;
+ struct drm_i915_query_item item;
+ struct drm_i915_query_eu_info *eus_info;
+ drm_i915_getparam_t gp;
+ int n_eus, n_eus_topology, s;
+
+ gp.param = I915_PARAM_EU_TOTAL;
+ gp.value = &n_eus;
+ do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ igt_debug("n_eus=%i\n", n_eus);
+
+ memset(&query, 0, sizeof(query));
+ query.num_items = 1;
+ query.items_ptr = (uintptr_t) &item;
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_EU_INFO;
+ do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+
+ eus_info = (struct drm_i915_query_eu_info *) calloc(1, item.length);
+
+ item.data_ptr = (uintptr_t) eus_info;
+ do_ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+
+ igt_debug("max_slices=%u max_subslices=%u max_eus_per_subslice=%u\n",
+ eus_info->max_slices, eus_info->max_subslices,
+ eus_info->max_eus_per_subslice);
+
+ n_eus_topology = 0;
+ for (s = 0; s < eus_info->max_slices; s++) {
+ int ss;
+
+ igt_debug("slice%i:\n", s);
+
+ for (ss = 0; ss < eus_info->max_subslices; ss++) {
+ int eu, n_subslice_eus = 0;
+
+ igt_debug("\tsubslice: %i\n", ss);
+
+ igt_debug("\t\teu_mask: 0b");
+ for (eu = 0; eu < eus_info->max_eus_per_subslice; eu++) {
+ uint8_t val = DRM_I915_QUERY_EU_AVAILABLE(eus_info, s, ss,
+ eus_info->max_eus_per_subslice - 1 - eu);
+ igt_debug("%hhi", val);
+ n_subslice_eus += __builtin_popcount(val);
+ n_eus_topology += __builtin_popcount(val);
+ }
+ igt_debug(" (%i)\n", n_subslice_eus);
+ }
+ }
+
+ igt_assert(n_eus_topology == n_eus);
+}
+
+igt_main
+{
+ int fd = -1;
+ int devid;
+
+ igt_fixture {
+ fd = drm_open_driver(DRIVER_INTEL);
+ igt_require(has_query_supports(fd));
+ devid = intel_get_drm_devid(fd);
+ }
+
+ igt_subtest("query-garbage")
+ test_query_garbage(fd);
+
+ igt_subtest("query-topology-pre-gen8") {
+ igt_require(intel_gen(devid) < 8);
+ igt_require(query_topology_supported(fd));
+ test_query_topology_pre_gen8(fd);
+ }
+
+ igt_subtest("query-topology-coherent-slice-mask") {
+ igt_require(AT_LEAST_GEN(devid, 8));
+ igt_require(query_topology_supported(fd));
+ test_query_topology_coherent_slice_mask(fd);
+ }
+
+ igt_subtest("query-topology-matches-eu-total") {
+ igt_require(AT_LEAST_GEN(devid, 8));
+ igt_require(query_topology_supported(fd));
+ test_query_topology_matches_eu_total(fd);
+ }
+
+ igt_fixture {
+ close(fd);
+ }
+}
--
2.15.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] include: bump drm uAPI headers
2018-01-16 16:07 [PATCH i-g-t 1/2] include: bump drm uAPI headers Lionel Landwerlin
2018-01-16 16:07 ` [PATCH i-g-t 2/2] tests: add i915 query tests Lionel Landwerlin
@ 2018-01-16 18:32 ` Patchwork
2018-01-16 21:18 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-01-17 10:05 ` [PATCH i-g-t 1/2] " Daniel Vetter
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-01-16 18:32 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] include: bump drm uAPI headers
URL : https://patchwork.freedesktop.org/series/36561/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
5f5b4a65e672bd10a4422cc1cb3c466659c52db8 igt/gem_linear_blits: Compute GTT size using 4G limit
with latest DRM-Tip kernel build CI_DRM_3636
a0ca279440c8 drm-tip: 2018y-01m-16d-10h-49m-51s UTC integration manifest
Testlist changes:
+igt@query@query-garbage
+igt@query@query-topology-coherent-slice-mask
+igt@query@query-topology-matches-eu-total
+igt@query@query-topology-pre-gen8
Test debugfs_test:
Subgroup read_all_entries:
dmesg-warn -> PASS (fi-elk-e7500) fdo#103989 +1
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575
fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:420s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:429s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:373s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:493s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:282s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:489s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:487s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:469s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:458s
fi-elk-e7500 total:224 pass:168 dwarn:10 dfail:0 fail:0 skip:45
fi-gdg-551 total:288 pass:180 dwarn:0 dfail:0 fail:0 skip:108 time:280s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:515s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:393s
fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:401s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:413s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:465s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:418s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:458s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:503s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:458s
fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:503s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:592s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:434s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:511s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:529s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:492s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:499s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:434s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:536s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:402s
Blacklisted hosts:
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:574s
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:473s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_785/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.IGT: warning for series starting with [1/2] include: bump drm uAPI headers
2018-01-16 16:07 [PATCH i-g-t 1/2] include: bump drm uAPI headers Lionel Landwerlin
2018-01-16 16:07 ` [PATCH i-g-t 2/2] tests: add i915 query tests Lionel Landwerlin
2018-01-16 18:32 ` ✓ Fi.CI.BAT: success for series starting with [1/2] include: bump drm uAPI headers Patchwork
@ 2018-01-16 21:18 ` Patchwork
2018-01-17 10:05 ` [PATCH i-g-t 1/2] " Daniel Vetter
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-01-16 21:18 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] include: bump drm uAPI headers
URL : https://patchwork.freedesktop.org/series/36561/
State : warning
== Summary ==
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail -> PASS (shard-snb) fdo#101623
Test kms_flip:
Subgroup flip-vs-fences-interruptible:
dmesg-warn -> PASS (shard-hsw) fdo#102614
Subgroup vblank-vs-suspend-interruptible:
pass -> SKIP (shard-hsw) fdo#100368
Test kms_draw_crc:
Subgroup draw-method-xrgb8888-render-xtiled:
pass -> SKIP (shard-snb)
Test gem_tiled_swapping:
Subgroup non-threaded:
incomplete -> PASS (shard-snb) fdo#104218
Test perf:
Subgroup blocking:
pass -> FAIL (shard-hsw) fdo#102252 +1
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
shard-hsw total:2733 pass:1547 dwarn:1 dfail:0 fail:11 skip:1174 time:8973s
shard-snb total:2733 pass:1318 dwarn:1 dfail:0 fail:10 skip:1404 time:7859s
Blacklisted hosts:
shard-apl total:2733 pass:1702 dwarn:1 dfail:0 fail:25 skip:1005 time:13915s
shard-kbl total:2638 pass:1724 dwarn:33 dfail:0 fail:23 skip:857 time:10304s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_785/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 2/2] tests: add i915 query tests
2018-01-16 16:07 ` [PATCH i-g-t 2/2] tests: add i915 query tests Lionel Landwerlin
@ 2018-01-16 21:34 ` Chris Wilson
2018-01-16 21:38 ` Chris Wilson
2018-01-17 12:31 ` Lionel Landwerlin
0 siblings, 2 replies; 9+ messages in thread
From: Chris Wilson @ 2018-01-16 21:34 UTC (permalink / raw)
To: Lionel Landwerlin, intel-gfx
Quoting Lionel Landwerlin (2018-01-16 16:07:28)
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
> tests/Makefile.sources | 1 +
> tests/meson.build | 1 +
> tests/query.c | 268 +++++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 270 insertions(+)
> create mode 100644 tests/query.c
>
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index e4e06d01..390cc82b 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -227,6 +227,7 @@ TESTS_progs = \
> prime_self_import \
> prime_udl \
> prime_vgem \
> + query \
> sw_sync \
> syncobj_basic \
> syncobj_wait \
> diff --git a/tests/meson.build b/tests/meson.build
> index 4c4bee1d..70df38f3 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -204,6 +204,7 @@ test_progs = [
> 'prime_self_import',
> 'prime_udl',
> 'prime_vgem',
> + 'query',
> 'sw_sync',
> 'syncobj_basic',
> 'syncobj_wait',
> diff --git a/tests/query.c b/tests/query.c
> new file mode 100644
> index 00000000..cb5aedd4
> --- /dev/null
> +++ b/tests/query.c
> @@ -0,0 +1,268 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +
> +IGT_TEST_DESCRIPTION("Testing the query uAPI.");
> +
> +static bool has_query_supports(int fd)
> +{
> + struct drm_i915_query query = {};
> +
> + return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0;
> +}
> +
> +static void test_query_garbage(int fd)
> +{
> + struct drm_i915_query query;
> + struct drm_i915_query_item items[2];
> +
> + memset(&query, 0, sizeof(query));
> + query.num_items = 1;
> + query.items_ptr = 0xffffffff;
That might be legal on 64b. I think you mean -1.
For bonus points. .items_ptr = - num_items * sizeof(query) and variable
number of items.
> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT);
do_ioctl_err() you never want to see the error message.
int __i915_query(int fd, struct drm_i915_query *q); /* returns err */
void i915_query(int fd, struct drm_i915_query *q); /* asserts success */
> +
> + memset(&query, 0, sizeof(query));
> + query.num_items = 1;
> + query.items_ptr = 0;
> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT);
> +
> + memset(&query, 0, sizeof(query));
> + query.num_items = 2;
> + query.items_ptr = (uintptr_t) items;
.items_ptr = to_user_pointer(item);
Just reads nicer.
Also check overflow of num_items * items_ptr. So num_items = (INT_MAX,
UINT_MAX, LONG_MAX, ULONG_MAX etc) / sizeof(query) + 1.
> + memset(items, 0, sizeof(items));
> + items[0].query_id = 0xffffffff;
> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
> +
> + memset(&query, 0, sizeof(query));
> + query.num_items = 2;
> + query.items_ptr = (uintptr_t) items;
> + memset(items, 0, sizeof(items));
> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
> +
> + memset(&query, 0, sizeof(query));
> + query.num_items = 2;
> + query.items_ptr = (uintptr_t) items;
> + memset(items, 0, sizeof(items));
> + items[0].query_id = DRM_I915_QUERY_SLICE_INFO;
> + items[0].length = 0xffffffff;
> + items[1].query_id = DRM_I915_QUERY_SUBSLICE_INFO;
> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
> +}
> +
> +static bool query_topology_supported(int fd)
> +{
> + struct drm_i915_query query;
> + struct drm_i915_query_item item;
> +
> + memset(&query, 0, sizeof(query));
> + query.num_items = 1;
> + query.items_ptr = (uintptr_t) &item;
> +
> + memset(&item, 0, sizeof(item));
> + item.query_id = DRM_I915_QUERY_SLICE_INFO;
struct drm_i915_query_item item = {
.query_id = DRM_I915_QUERY_SLICE_INFO,
};
return __i915_query_item(fd, &item) == 0;
__i915_query_item(int fd, *item) {
struct drm_i915_query q = {
.num_items = 1,
.items_ptr = to_user_pointer(item),
}
return __i915_query(fd, &q);
}
Or __i915_query_one() ?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 2/2] tests: add i915 query tests
2018-01-16 21:34 ` Chris Wilson
@ 2018-01-16 21:38 ` Chris Wilson
2018-01-17 12:31 ` Lionel Landwerlin
2018-01-17 12:31 ` Lionel Landwerlin
1 sibling, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2018-01-16 21:38 UTC (permalink / raw)
To: Lionel Landwerlin, intel-gfx
Quoting Chris Wilson (2018-01-16 21:34:34)
> Quoting Lionel Landwerlin (2018-01-16 16:07:28)
> > Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> > ---
> > tests/Makefile.sources | 1 +
> > tests/meson.build | 1 +
> > tests/query.c | 268 +++++++++++++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 270 insertions(+)
> > create mode 100644 tests/query.c
> >
> > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > index e4e06d01..390cc82b 100644
> > --- a/tests/Makefile.sources
> > +++ b/tests/Makefile.sources
> > @@ -227,6 +227,7 @@ TESTS_progs = \
> > prime_self_import \
> > prime_udl \
> > prime_vgem \
> > + query \
> > sw_sync \
> > syncobj_basic \
> > syncobj_wait \
> > diff --git a/tests/meson.build b/tests/meson.build
> > index 4c4bee1d..70df38f3 100644
> > --- a/tests/meson.build
> > +++ b/tests/meson.build
> > @@ -204,6 +204,7 @@ test_progs = [
> > 'prime_self_import',
> > 'prime_udl',
> > 'prime_vgem',
> > + 'query',
> > 'sw_sync',
> > 'syncobj_basic',
> > 'syncobj_wait',
> > diff --git a/tests/query.c b/tests/query.c
> > new file mode 100644
> > index 00000000..cb5aedd4
> > --- /dev/null
> > +++ b/tests/query.c
> > @@ -0,0 +1,268 @@
> > +/*
> > + * Copyright © 2017 Intel Corporation
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice (including the next
> > + * paragraph) shall be included in all copies or substantial portions of the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > + * IN THE SOFTWARE.
> > + */
> > +
> > +#include "igt.h"
> > +
> > +IGT_TEST_DESCRIPTION("Testing the query uAPI.");
> > +
> > +static bool has_query_supports(int fd)
> > +{
> > + struct drm_i915_query query = {};
> > +
> > + return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0;
> > +}
> > +
> > +static void test_query_garbage(int fd)
> > +{
> > + struct drm_i915_query query;
> > + struct drm_i915_query_item items[2];
> > +
> > + memset(&query, 0, sizeof(query));
> > + query.num_items = 1;
> > + query.items_ptr = 0xffffffff;
>
> That might be legal on 64b. I think you mean -1.
>
> For bonus points. .items_ptr = - num_items * sizeof(query) and variable
> number of items.
There's also a fun one where you
query.items_ptr = mmap(0, 4096, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
igt_assert(__i915_query(fd, &query) == 0);
munmap(query.items_ptr, 4096);
igt_assert(__i915_query(fd, &query) == -EFAULT);
Adjust for compilation :)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 1/2] include: bump drm uAPI headers
2018-01-16 16:07 [PATCH i-g-t 1/2] include: bump drm uAPI headers Lionel Landwerlin
` (2 preceding siblings ...)
2018-01-16 21:18 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2018-01-17 10:05 ` Daniel Vetter
3 siblings, 0 replies; 9+ messages in thread
From: Daniel Vetter @ 2018-01-17 10:05 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: IGT development, intel-gfx
On Tue, Jan 16, 2018 at 04:07:27PM +0000, Lionel Landwerlin wrote:
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Please remember to send igt patches to the new mailing list in the future.
Adding it.
-Daniel
> ---
> include/drm-uapi/i915_drm.h | 126 ++++++++++++++++++++++++++++++++++++++++++++
> lib/igt_perf.h | 7 ---
> 2 files changed, 126 insertions(+), 7 deletions(-)
>
> diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
> index 7f28eea4..80debdf5 100644
> --- a/include/drm-uapi/i915_drm.h
> +++ b/include/drm-uapi/i915_drm.h
> @@ -102,6 +102,46 @@ enum drm_i915_gem_engine_class {
> I915_ENGINE_CLASS_INVALID = -1
> };
>
> +/**
> + * DOC: perf_events exposed by i915 through /sys/bus/event_sources/drivers/i915
> + *
> + */
> +
> +enum drm_i915_pmu_engine_sample {
> + I915_SAMPLE_BUSY = 0,
> + I915_SAMPLE_WAIT = 1,
> + I915_SAMPLE_SEMA = 2
> +};
> +
> +#define I915_PMU_SAMPLE_BITS (4)
> +#define I915_PMU_SAMPLE_MASK (0xf)
> +#define I915_PMU_SAMPLE_INSTANCE_BITS (8)
> +#define I915_PMU_CLASS_SHIFT \
> + (I915_PMU_SAMPLE_BITS + I915_PMU_SAMPLE_INSTANCE_BITS)
> +
> +#define __I915_PMU_ENGINE(class, instance, sample) \
> + ((class) << I915_PMU_CLASS_SHIFT | \
> + (instance) << I915_PMU_SAMPLE_BITS | \
> + (sample))
> +
> +#define I915_PMU_ENGINE_BUSY(class, instance) \
> + __I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY)
> +
> +#define I915_PMU_ENGINE_WAIT(class, instance) \
> + __I915_PMU_ENGINE(class, instance, I915_SAMPLE_WAIT)
> +
> +#define I915_PMU_ENGINE_SEMA(class, instance) \
> + __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
> +
> +#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
> +
> +#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
> +#define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1)
> +#define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2)
> +#define I915_PMU_RC6_RESIDENCY __I915_PMU_OTHER(3)
> +
> +#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY
> +
> /* Each region is a minimum of 16k, and there are at most 255 of them.
> */
> #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
> @@ -278,6 +318,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_I915_PERF_OPEN 0x36
> #define DRM_I915_PERF_ADD_CONFIG 0x37
> #define DRM_I915_PERF_REMOVE_CONFIG 0x38
> +#define DRM_I915_QUERY 0x39
>
> #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
> #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
> @@ -335,6 +376,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
> #define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
> #define DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
> +#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
>
> /* Allow drivers to submit batchbuffers directly to hardware, relying
> * on the security mechanisms provided by hardware.
> @@ -1573,6 +1615,90 @@ struct drm_i915_perf_oa_config {
> __u64 flex_regs_ptr;
> };
>
> +
> +struct drm_i915_query_item {
> + __u64 query_id;
> +#define DRM_I915_QUERY_SLICE_INFO 0x01
> +#define DRM_I915_QUERY_SUBSLICE_INFO 0x02
> +#define DRM_I915_QUERY_EU_INFO 0x03
> +
> + /*
> + * When set to zero by userspace, this is filled with the size of the
> + * data to be written at the data_ptr pointer.
> + */
> + __u32 length;
> +
> + __u32 flags;
> +
> + /*
> + * Data will be written at the location pointed by data_ptr when the
> + * value of length matches the length of the data to be written by the
> + * kernel.
> + */
> + __u64 data_ptr;
> +};
> +
> +struct drm_i915_query {
> + __u32 num_items;
> + __u32 flags;
> +
> + /*
> + * This point to an array of num_items drm_i915_query_item structures.
> + */
> + __u64 items_ptr;
> +};
> +
> +#define DRM_I915_BIT(bit) ((__u32)1 << (bit))
> +#define DRM_I915_DIV_ROUND_UP(val, div) (((val) + (div) - 1) / (div))
> +
> +/* Data written by the kernel with query DRM_I915_QUERY_ID_SLICES_INFO :
> + *
> + * data: each bit indicates whether a slice is available (1) or fused off (0).
> + * Use DRM_I915_QUERY_SLICE_AVAILABLE() to query a given slice's
> + * availability.
> + */
> +struct drm_i915_query_slice_info {
> + __u32 max_slices;
> +
> +#define DRM_I915_QUERY_SLICE_AVAILABLE(info, slice) \
> + !!((info)->data[(slice) / 8] & DRM_I915_BIT((slice) % 8))
> + __u8 data[];
> +};
> +
> +/* Data written by the kernel with query DRM_I915_QUERY_ID_SUBSLICES_INFO :
> + *
> + * data: each bit indicates whether a subslice is available (1) or fused off
> + * (0). Use DRM_I915_QUERY_SUBSLICE_AVAILABLE() to query a given
> + * subslice's availability.
> + */
> +struct drm_i915_query_subslice_info {
> + __u32 max_slices;
> + __u32 max_subslices;
> +
> +#define DRM_I915_QUERY_SUBSLICE_AVAILABLE(info, slice, subslice) \
> + !!((info)->data[(slice) * DRM_I915_DIV_ROUND_UP((info)->max_subslices, 8) + \
> + (subslice) / 8] & DRM_I915_BIT((subslice) % 8))
> + __u8 data[];
> +};
> +
> +/* Data written by the kernel with query DRM_I915_QUERY_ID_EUS_INFO :
> + *
> + * data: Each bit indicates whether a subslice is available (1) or fused off
> + * (0). Use DRM_I915_QUERY_EU_AVAILABLE() to query a given EU's
> + * availability.
> + */
> +struct drm_i915_query_eu_info {
> + __u32 max_slices;
> + __u32 max_subslices;
> + __u32 max_eus_per_subslice;
> +
> +#define DRM_I915_QUERY_EU_AVAILABLE(info, slice, subslice, eu) \
> + !!((info)->data[(slice) * DRM_I915_DIV_ROUND_UP((info)->max_eus_per_subslice, 8) * (info)->max_subslices + \
> + (subslice) * DRM_I915_DIV_ROUND_UP((info)->max_eus_per_subslice, 8) + \
> + (eu) / 8] & DRM_I915_BIT((eu) % 8))
> + __u8 data[];
> +};
> +
> #if defined(__cplusplus)
> }
> #endif
> diff --git a/lib/igt_perf.h b/lib/igt_perf.h
> index 7b66fc58..105b8cd9 100644
> --- a/lib/igt_perf.h
> +++ b/lib/igt_perf.h
> @@ -31,13 +31,6 @@
>
> #include "igt_gt.h"
>
> -enum drm_i915_pmu_engine_sample {
> - I915_SAMPLE_BUSY = 0,
> - I915_SAMPLE_WAIT = 1,
> - I915_SAMPLE_SEMA = 2,
> - I915_ENGINE_SAMPLE_MAX /* non-ABI */
> -};
> -
> #define I915_PMU_SAMPLE_BITS (4)
> #define I915_PMU_SAMPLE_MASK (0xf)
> #define I915_PMU_SAMPLE_INSTANCE_BITS (8)
> --
> 2.15.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 2/2] tests: add i915 query tests
2018-01-16 21:34 ` Chris Wilson
2018-01-16 21:38 ` Chris Wilson
@ 2018-01-17 12:31 ` Lionel Landwerlin
1 sibling, 0 replies; 9+ messages in thread
From: Lionel Landwerlin @ 2018-01-17 12:31 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 16/01/18 21:34, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-01-16 16:07:28)
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> ---
>> tests/Makefile.sources | 1 +
>> tests/meson.build | 1 +
>> tests/query.c | 268 +++++++++++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 270 insertions(+)
>> create mode 100644 tests/query.c
>>
>> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
>> index e4e06d01..390cc82b 100644
>> --- a/tests/Makefile.sources
>> +++ b/tests/Makefile.sources
>> @@ -227,6 +227,7 @@ TESTS_progs = \
>> prime_self_import \
>> prime_udl \
>> prime_vgem \
>> + query \
>> sw_sync \
>> syncobj_basic \
>> syncobj_wait \
>> diff --git a/tests/meson.build b/tests/meson.build
>> index 4c4bee1d..70df38f3 100644
>> --- a/tests/meson.build
>> +++ b/tests/meson.build
>> @@ -204,6 +204,7 @@ test_progs = [
>> 'prime_self_import',
>> 'prime_udl',
>> 'prime_vgem',
>> + 'query',
>> 'sw_sync',
>> 'syncobj_basic',
>> 'syncobj_wait',
>> diff --git a/tests/query.c b/tests/query.c
>> new file mode 100644
>> index 00000000..cb5aedd4
>> --- /dev/null
>> +++ b/tests/query.c
>> @@ -0,0 +1,268 @@
>> +/*
>> + * Copyright © 2017 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the next
>> + * paragraph) shall be included in all copies or substantial portions of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>> + * IN THE SOFTWARE.
>> + */
>> +
>> +#include "igt.h"
>> +
>> +IGT_TEST_DESCRIPTION("Testing the query uAPI.");
>> +
>> +static bool has_query_supports(int fd)
>> +{
>> + struct drm_i915_query query = {};
>> +
>> + return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0;
>> +}
>> +
>> +static void test_query_garbage(int fd)
>> +{
>> + struct drm_i915_query query;
>> + struct drm_i915_query_item items[2];
>> +
>> + memset(&query, 0, sizeof(query));
>> + query.num_items = 1;
>> + query.items_ptr = 0xffffffff;
> That might be legal on 64b. I think you mean -1.
Thanks, will do.
>
> For bonus points. .items_ptr = - num_items * sizeof(query) and variable
> number of items.
Do you mean .items_ptr = - num_items * sizeof(items[0]) ?
I don't understand what you want to test by "variable number of items".
>
>> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT);
> do_ioctl_err() you never want to see the error message.
>
> int __i915_query(int fd, struct drm_i915_query *q); /* returns err */
> void i915_query(int fd, struct drm_i915_query *q); /* asserts success */
I get int __i915_query() but not void i915_query().
In my experience you want to see the assert in the test function. If
that's in a utility function, then you have no idea where it failed when
reading the CI logs.
>
>> +
>> + memset(&query, 0, sizeof(query));
>> + query.num_items = 1;
>> + query.items_ptr = 0;
>> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EFAULT);
>> +
>> + memset(&query, 0, sizeof(query));
>> + query.num_items = 2;
>> + query.items_ptr = (uintptr_t) items;
> .items_ptr = to_user_pointer(item);
>
> Just reads nicer.
Thanks.
>
> Also check overflow of num_items * items_ptr. So num_items = (INT_MAX,
> UINT_MAX, LONG_MAX, ULONG_MAX etc) / sizeof(query) + 1.
Again, not sure what this is supposed to test. We should get an EFAULT
as soon as we're outside mapped address space.
>
>> + memset(items, 0, sizeof(items));
>> + items[0].query_id = 0xffffffff;
>> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
>> +
>> + memset(&query, 0, sizeof(query));
>> + query.num_items = 2;
>> + query.items_ptr = (uintptr_t) items;
>> + memset(items, 0, sizeof(items));
>> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
>> +
>> + memset(&query, 0, sizeof(query));
>> + query.num_items = 2;
>> + query.items_ptr = (uintptr_t) items;
>> + memset(items, 0, sizeof(items));
>> + items[0].query_id = DRM_I915_QUERY_SLICE_INFO;
>> + items[0].length = 0xffffffff;
>> + items[1].query_id = DRM_I915_QUERY_SUBSLICE_INFO;
>> + do_ioctl_err(fd, DRM_IOCTL_I915_QUERY, &query, EINVAL);
>> +}
>> +
>> +static bool query_topology_supported(int fd)
>> +{
>> + struct drm_i915_query query;
>> + struct drm_i915_query_item item;
>> +
>> + memset(&query, 0, sizeof(query));
>> + query.num_items = 1;
>> + query.items_ptr = (uintptr_t) &item;
>> +
>> + memset(&item, 0, sizeof(item));
>> + item.query_id = DRM_I915_QUERY_SLICE_INFO;
> struct drm_i915_query_item item = {
> .query_id = DRM_I915_QUERY_SLICE_INFO,
> };
>
> return __i915_query_item(fd, &item) == 0;
>
> __i915_query_item(int fd, *item) {
> struct drm_i915_query q = {
> .num_items = 1,
> .items_ptr = to_user_pointer(item),
> }
> return __i915_query(fd, &q);
> }
>
> Or __i915_query_one() ?
> -Chris
Let's go with __i915_query_item(fd, items_ptr, n_items).
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH i-g-t 2/2] tests: add i915 query tests
2018-01-16 21:38 ` Chris Wilson
@ 2018-01-17 12:31 ` Lionel Landwerlin
0 siblings, 0 replies; 9+ messages in thread
From: Lionel Landwerlin @ 2018-01-17 12:31 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 16/01/18 21:38, Chris Wilson wrote:
> Quoting Chris Wilson (2018-01-16 21:34:34)
>> Quoting Lionel Landwerlin (2018-01-16 16:07:28)
>>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>> ---
>>> tests/Makefile.sources | 1 +
>>> tests/meson.build | 1 +
>>> tests/query.c | 268 +++++++++++++++++++++++++++++++++++++++++++++++++
>>> 3 files changed, 270 insertions(+)
>>> create mode 100644 tests/query.c
>>>
>>> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
>>> index e4e06d01..390cc82b 100644
>>> --- a/tests/Makefile.sources
>>> +++ b/tests/Makefile.sources
>>> @@ -227,6 +227,7 @@ TESTS_progs = \
>>> prime_self_import \
>>> prime_udl \
>>> prime_vgem \
>>> + query \
>>> sw_sync \
>>> syncobj_basic \
>>> syncobj_wait \
>>> diff --git a/tests/meson.build b/tests/meson.build
>>> index 4c4bee1d..70df38f3 100644
>>> --- a/tests/meson.build
>>> +++ b/tests/meson.build
>>> @@ -204,6 +204,7 @@ test_progs = [
>>> 'prime_self_import',
>>> 'prime_udl',
>>> 'prime_vgem',
>>> + 'query',
>>> 'sw_sync',
>>> 'syncobj_basic',
>>> 'syncobj_wait',
>>> diff --git a/tests/query.c b/tests/query.c
>>> new file mode 100644
>>> index 00000000..cb5aedd4
>>> --- /dev/null
>>> +++ b/tests/query.c
>>> @@ -0,0 +1,268 @@
>>> +/*
>>> + * Copyright © 2017 Intel Corporation
>>> + *
>>> + * Permission is hereby granted, free of charge, to any person obtaining a
>>> + * copy of this software and associated documentation files (the "Software"),
>>> + * to deal in the Software without restriction, including without limitation
>>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>>> + * and/or sell copies of the Software, and to permit persons to whom the
>>> + * Software is furnished to do so, subject to the following conditions:
>>> + *
>>> + * The above copyright notice and this permission notice (including the next
>>> + * paragraph) shall be included in all copies or substantial portions of the
>>> + * Software.
>>> + *
>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
>>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>>> + * IN THE SOFTWARE.
>>> + */
>>> +
>>> +#include "igt.h"
>>> +
>>> +IGT_TEST_DESCRIPTION("Testing the query uAPI.");
>>> +
>>> +static bool has_query_supports(int fd)
>>> +{
>>> + struct drm_i915_query query = {};
>>> +
>>> + return igt_ioctl(fd, DRM_IOCTL_I915_QUERY, &query) == 0;
>>> +}
>>> +
>>> +static void test_query_garbage(int fd)
>>> +{
>>> + struct drm_i915_query query;
>>> + struct drm_i915_query_item items[2];
>>> +
>>> + memset(&query, 0, sizeof(query));
>>> + query.num_items = 1;
>>> + query.items_ptr = 0xffffffff;
>> That might be legal on 64b. I think you mean -1.
>>
>> For bonus points. .items_ptr = - num_items * sizeof(query) and variable
>> number of items.
> There's also a fun one where you
>
> query.items_ptr = mmap(0, 4096, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
> igt_assert(__i915_query(fd, &query) == 0);
> munmap(query.items_ptr, 4096);
> igt_assert(__i915_query(fd, &query) == -EFAULT);
>
> Adjust for compilation :)
> -Chris
>
Thanks, done.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-01-17 12:31 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-01-16 16:07 [PATCH i-g-t 1/2] include: bump drm uAPI headers Lionel Landwerlin
2018-01-16 16:07 ` [PATCH i-g-t 2/2] tests: add i915 query tests Lionel Landwerlin
2018-01-16 21:34 ` Chris Wilson
2018-01-16 21:38 ` Chris Wilson
2018-01-17 12:31 ` Lionel Landwerlin
2018-01-17 12:31 ` Lionel Landwerlin
2018-01-16 18:32 ` ✓ Fi.CI.BAT: success for series starting with [1/2] include: bump drm uAPI headers Patchwork
2018-01-16 21:18 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-01-17 10:05 ` [PATCH i-g-t 1/2] " Daniel Vetter
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox