From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: lucas.demarchi@intel.com, rodrigo.vivi@intel.com
Subject: [PATCH v3 0/2] CNL port refactoring
Date: Tue, 13 Mar 2018 09:46:20 +0530 [thread overview]
Message-ID: <20180313041622.5718-1-mahesh1.kumar@intel.com> (raw)
This series fixes CNL PORT_TX_DW5/7_LNO_D register address.
This series also introduces macros to get register address of
CNL_PORT_TX registers instead of defining for each DW instance.
changes since V1:
completely kill _MMIO_PORT6 macro
changes since V2:
use underscore prefix in macro
merge patch 1 and 2
Mahesh Kumar (2):
drm/i915/cnl; Add macro to get PORT_TX register
drm/i915/cnl: Kill _MMIO_PORT6 macro
drivers/gpu/drm/i915/i915_reg.h | 147 ++++++++++++----------------------------
1 file changed, 44 insertions(+), 103 deletions(-)
--
2.14.1
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next reply other threads:[~2018-03-13 4:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-13 4:16 Mahesh Kumar [this message]
2018-03-13 4:16 ` [PATCH v3 1/2] drm/i915/cnl; Add macro to get PORT_TX register Mahesh Kumar
2018-03-13 4:16 ` [PATCH v3 2/2] drm/i915/cnl: Kill _MMIO_PORT6 macro Mahesh Kumar
2018-03-13 20:44 ` Rodrigo Vivi
2018-03-13 5:05 ` ✓ Fi.CI.BAT: success for CNL port refactoring (rev3) Patchwork
2018-03-13 8:37 ` ✗ Fi.CI.IGT: warning " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2018-03-14 8:06 [PATCH v3 0/2] CNL port refactoring Mahesh Kumar
2018-03-14 21:38 ` Rodrigo Vivi
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