From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, lucas.demarchi@intel.com
Subject: Re: [PATCH v3 0/2] CNL port refactoring
Date: Wed, 14 Mar 2018 14:38:32 -0700 [thread overview]
Message-ID: <20180314213832.GV3945@intel.com> (raw)
In-Reply-To: <20180314080653.9444-1-mahesh1.kumar@intel.com>
On Wed, Mar 14, 2018 at 01:36:51PM +0530, Mahesh Kumar wrote:
> This series fixes CNL PORT_TX_DW5/7_LNO_D register address.
> This series also introduces macros to get register address of
> CNL_PORT_TX registers instead of defining for each DW instance.
>
> changes since V1:
> completely kill _MMIO_PORT6 macro
> changes since V2:
> use underscore prefix in macro
> merge patch 1 and 2
> changes since V3:
> Address review comments
pushed to dinq. Thanks for that.
>
> Mahesh Kumar (2):
> drm/i915/cnl; Add macro to get PORT_TX register
> drm/i915/cnl: Kill _MMIO_PORT6 macro
>
> drivers/gpu/drm/i915/i915_reg.h | 147 ++++++++++++----------------------------
> 1 file changed, 44 insertions(+), 103 deletions(-)
>
> --
> 2.14.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-03-14 21:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-14 8:06 [PATCH v3 0/2] CNL port refactoring Mahesh Kumar
2018-03-14 8:06 ` [PATCH v4 1/2] drm/i915/cnl; Add macro to get PORT_TX register Mahesh Kumar
2018-03-15 9:25 ` Chauhan, Madhav
2018-03-15 9:28 ` Chauhan, Madhav
2018-03-14 8:06 ` [PATCH v4 2/2] drm/i915/cnl: Kill _MMIO_PORT6 macro Mahesh Kumar
2018-03-14 8:49 ` ✓ Fi.CI.BAT: success for CNL port refactoring (rev4) Patchwork
2018-03-14 10:37 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-03-14 21:38 ` Rodrigo Vivi [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-03-13 4:16 [PATCH v3 0/2] CNL port refactoring Mahesh Kumar
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