[PATCH] drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

[PATCH] drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

[Imre Deak]

On GLK sporadic timeouts occur during PHY0 enabling. Based on logs it looks
like they happen sometime after a system suspend/resume cycle, with the
same power well enabling succeeding both before and after the failed
one and no other problems observed. The current timeout in the code is
not actually specified by BSpec, so let's try to increase that until a
BSpec update.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105771
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_dpio_phy.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
index c8e9e44e5981..00b3ab656b06 100644
--- a/drivers/gpu/drm/i915/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
@@ -380,13 +380,14 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
 	 * all 1s.  Eventually they become accessible as they power up, then
 	 * the reserved bit will give the default 0.  Poll on the reserved bit
 	 * becoming 0 to find when the PHY is accessible.
-	 * HW team confirmed that the time to reach phypowergood status is
-	 * anywhere between 50 us and 100us.
+	 * The flag should get set in 100us according to the HW team, but
+	 * use 1ms due to occasional timeouts observed with that.
 	 */
-	if (wait_for_us(((I915_READ(BXT_PORT_CL1CM_DW0(phy)) &
-		(PHY_RESERVED | PHY_POWER_GOOD)) == PHY_POWER_GOOD), 100)) {
+	if (intel_wait_for_register_fw(dev_priv, BXT_PORT_CL1CM_DW0(phy),
+				       PHY_RESERVED | PHY_POWER_GOOD,
+				       PHY_POWER_GOOD,
+				       1))
 		DRM_ERROR("timeout during PHY%d power on\n", phy);
-	}
 
 	/* Program PLL Rcomp code offset */
 	val = I915_READ(BXT_PORT_CL1CM_DW9(phy));
-- 
2.13.2

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✓ Fi.CI.BAT: success for drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

[Patchwork]

== Series Details ==

Series: drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout
URL   : https://patchwork.freedesktop.org/series/41366/
State : success

== Summary ==

Series 41366v1 drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout
https://patchwork.freedesktop.org/api/1.0/series/41366/revisions/1/mbox/

---- Known issues:

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-c:
                pass       -> INCOMPLETE (fi-bxt-dsi) fdo#103927
Test prime_vgem:
        Subgroup basic-fence-flip:
                pass       -> FAIL       (fi-ilk-650) fdo#104008

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:430s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:446s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:382s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:536s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:299s
fi-bxt-dsi       total:243  pass:216  dwarn:0   dfail:0   fail:0   skip:26 
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:512s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:521s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:508s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:409s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:562s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:511s
fi-cnl-y3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:587s
fi-elk-e7500     total:285  pass:226  dwarn:0   dfail:0   fail:0   skip:59  time:425s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:317s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:539s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:487s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:411s
fi-ilk-650       total:285  pass:224  dwarn:0   dfail:0   fail:1   skip:60  time:421s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:481s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:433s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:472s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:463s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:519s
fi-pnv-d510      total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:668s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:446s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:531s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:500s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:504s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:430s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:442s
fi-snb-2520m     total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:572s
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:406s

e5a01dd0c5d224beec064e40184cc63a82ae79ce drm-tip: 2018y-04m-09d-12h-37m-09s UTC integration manifest
031e10c34d8a drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8641/issues.html
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Re: [PATCH] drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

[Ville Syrjälä]

On Mon, Apr 09, 2018 at 03:27:16PM +0300, Imre Deak wrote:
> On GLK sporadic timeouts occur during PHY0 enabling. Based on logs it looks
> like they happen sometime after a system suspend/resume cycle, with the
> same power well enabling succeeding both before and after the failed
> one and no other problems observed. The current timeout in the code is
> not actually specified by BSpec, so let's try to increase that until a
> BSpec update.

Looks like we've always used 1ms on CHV. I couldn't find any specific
notes on how long we should poll in any of the CHV PHY docs. So I assume
we just picked 1ms since it seemed sufficient.

Doing the same for BXT/GLK seems reasonable to me.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105771
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dpio_phy.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
> index c8e9e44e5981..00b3ab656b06 100644
> --- a/drivers/gpu/drm/i915/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
> @@ -380,13 +380,14 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
>  	 * all 1s.  Eventually they become accessible as they power up, then
>  	 * the reserved bit will give the default 0.  Poll on the reserved bit
>  	 * becoming 0 to find when the PHY is accessible.
> -	 * HW team confirmed that the time to reach phypowergood status is
> -	 * anywhere between 50 us and 100us.
> +	 * The flag should get set in 100us according to the HW team, but
> +	 * use 1ms due to occasional timeouts observed with that.
>  	 */
> -	if (wait_for_us(((I915_READ(BXT_PORT_CL1CM_DW0(phy)) &
> -		(PHY_RESERVED | PHY_POWER_GOOD)) == PHY_POWER_GOOD), 100)) {
> +	if (intel_wait_for_register_fw(dev_priv, BXT_PORT_CL1CM_DW0(phy),
> +				       PHY_RESERVED | PHY_POWER_GOOD,
> +				       PHY_POWER_GOOD,
> +				       1))
>  		DRM_ERROR("timeout during PHY%d power on\n", phy);
> -	}
>  
>  	/* Program PLL Rcomp code offset */
>  	val = I915_READ(BXT_PORT_CL1CM_DW9(phy));
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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✓ Fi.CI.IGT: success for drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

[Patchwork]

== Series Details ==

Series: drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout
URL   : https://patchwork.freedesktop.org/series/41366/
State : success

== Summary ==

---- Known issues:

Test kms_flip:
        Subgroup 2x-wf_vblank-ts-check:
                fail       -> PASS       (shard-hsw) fdo#100368

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368

shard-apl        total:2680 pass:1835 dwarn:1   dfail:0   fail:7   skip:836 time:12687s
shard-hsw        total:2680 pass:1786 dwarn:1   dfail:0   fail:1   skip:891 time:11445s
Blacklisted hosts:
shard-snb        total:2680 pass:1377 dwarn:1   dfail:0   fail:3   skip:1299 time:6957s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8641/shards.html
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Re: ✓ Fi.CI.IGT: success for drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout

[Imre Deak]

On Mon, Apr 09, 2018 at 04:17:43PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/gen9_lp: Increase DDI PHY0 power well enabling timeout
> URL   : https://patchwork.freedesktop.org/series/41366/
> State : success

Pushed to -dinq, thanks for the review.

> 
> == Summary ==
> 
> ---- Known issues:
> 
> Test kms_flip:
>         Subgroup 2x-wf_vblank-ts-check:
>                 fail       -> PASS       (shard-hsw) fdo#100368
> 
> fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
> 
> shard-apl        total:2680 pass:1835 dwarn:1   dfail:0   fail:7   skip:836 time:12687s
> shard-hsw        total:2680 pass:1786 dwarn:1   dfail:0   fail:1   skip:891 time:11445s
> Blacklisted hosts:
> shard-snb        total:2680 pass:1377 dwarn:1   dfail:0   fail:3   skip:1299 time:6957s
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8641/shards.html
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