* [PATCH] drm/i915/psr: Add psr1 live status
@ 2018-06-22 3:59 vathsala nagaraju
2018-06-22 4:44 ` ✓ Fi.CI.BAT: success for drm/i915/psr: Add psr1 live status (rev2) Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: vathsala nagaraju @ 2018-06-22 3:59 UTC (permalink / raw)
To: dhinakaran.pandiyan, jani.nikula, intel-gfx; +Cc: Rodrigo Vivi
From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Prints live state of psr1.Extending the existing
PSR2 live state function to cover psr1.
Tested on KBL with psr2 and psr1 panel.
v2: rebase
v3: DK
Rename psr2_live_status to psr_source_status.
v4: DK
Move EDP_PSR_STATUS_STATE_SHIFT below EDP_PSR_STATUS_STATE_MASK.
Pass seq to psr_source_status, handle source status prints in
psr_source_status.
v5: Fixed CI warning messages
v6:
Remove extra space in the title before the colon.(DK)
Rebase. (Jani)
v7: use tabs for indenting the values.(Jani)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 72 ++++++++++++++++++++++++-------------
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 49 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index c400f42..3941d85 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2597,27 +2597,55 @@ static int i915_guc_log_relay_release(struct inode *inode, struct file *file)
.release = i915_guc_log_relay_release,
};
-static const char *psr2_live_status(u32 val)
-{
- static const char * const live_status[] = {
- "IDLE",
- "CAPTURE",
- "CAPTURE_FS",
- "SLEEP",
- "BUFON_FW",
- "ML_UP",
- "SU_STANDBY",
- "FAST_SLEEP",
- "DEEP_SLEEP",
- "BUF_ON",
- "TG_ON"
- };
+static void
+psr_source_status(struct drm_i915_private *dev_priv, struct seq_file *m)
+{
+ u32 val, psr_status = 0;
- val = (val & EDP_PSR2_STATUS_STATE_MASK) >> EDP_PSR2_STATUS_STATE_SHIFT;
- if (val < ARRAY_SIZE(live_status))
- return live_status[val];
+ if (dev_priv->psr.psr2_enabled) {
+ static const char * const live_status[] = {
+ "IDLE",
+ "CAPTURE",
+ "CAPTURE_FS",
+ "SLEEP",
+ "BUFON_FW",
+ "ML_UP",
+ "SU_STANDBY",
+ "FAST_SLEEP",
+ "DEEP_SLEEP",
+ "BUF_ON",
+ "TG_ON"
+ };
+ psr_status = I915_READ(EDP_PSR2_STATUS);
+ val = (psr_status & EDP_PSR2_STATUS_STATE_MASK) >>
+ EDP_PSR2_STATUS_STATE_SHIFT;
+ if (val < ARRAY_SIZE(live_status)) {
+ seq_printf(m, "Source PSR status: %x[%s]\n", psr_status,
+ live_status[val]);
+ return;
+ }
+ } else {
+ static const char * const live_status[] = {
+ "IDLE",
+ "SRDONACK",
+ "SRDENT",
+ "BUFOFF",
+ "BUFON",
+ "AUXACK",
+ "SRDOFFACK",
+ "SRDENT_ON",
+ };
+ psr_status = I915_READ(EDP_PSR_STATUS);
+ val = (psr_status & EDP_PSR_STATUS_STATE_MASK) >>
+ EDP_PSR_STATUS_STATE_SHIFT;
+ if (val < ARRAY_SIZE(live_status)) {
+ seq_printf(m, "Source PSR status: %x[%s]\n", psr_status,
+ live_status[val]);
+ return;
+ }
+ }
- return "unknown";
+ seq_printf(m, "Source psr status: %x[%s]\n", psr_status, "unknown");
}
static const char *psr_sink_status(u8 val)
@@ -2681,12 +2709,8 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
seq_printf(m, "Performance_Counter: %u\n", psrperf);
}
- if (dev_priv->psr.psr2_enabled) {
- u32 psr2 = I915_READ(EDP_PSR2_STATUS);
- seq_printf(m, "EDP_PSR2_STATUS: %x [%s]\n",
- psr2, psr2_live_status(psr2));
- }
+ psr_source_status(dev_priv, m);
if (dev_priv->psr.enabled) {
struct drm_dp_aux *aux = &dev_priv->psr.enabled->aux;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index caad19f..4efad4d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4072,6 +4072,7 @@ enum {
#define EDP_PSR_STATUS _MMIO(dev_priv->psr_mmio_base + 0x40)
#define EDP_PSR_STATUS_STATE_MASK (7 << 29)
+#define EDP_PSR_STATUS_STATE_SHIFT 29
#define EDP_PSR_STATUS_STATE_IDLE (0 << 29)
#define EDP_PSR_STATUS_STATE_SRDONACK (1 << 29)
#define EDP_PSR_STATUS_STATE_SRDENT (2 << 29)
--
1.9.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/psr: Add psr1 live status (rev2)
2018-06-22 3:59 [PATCH] drm/i915/psr: Add psr1 live status vathsala nagaraju
@ 2018-06-22 4:44 ` Patchwork
2018-06-22 12:57 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-22 18:51 ` [PATCH] drm/i915/psr: Add psr1 live status Dhinakaran Pandiyan
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-06-22 4:44 UTC (permalink / raw)
To: vathsala nagaraju; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Add psr1 live status (rev2)
URL : https://patchwork.freedesktop.org/series/45143/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4368 -> Patchwork_9392 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/45143/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_9392 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
==== Possible fixes ====
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
== Participating hosts (43 -> 37) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-glk-dsi fi-bsw-cyan fi-ctg-p8600 fi-kbl-x1275
== Build changes ==
* Linux: CI_DRM_4368 -> Patchwork_9392
CI_DRM_4368: f9f621dc095a8bfd2157fba018ddb542260d8daa @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4528: 6be300d405de5974b262e8b93a445be4ac618e6a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9392: 717c5cfed95ac3cf27eebdf934d00cf179523c5b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
717c5cfed95a drm/i915/psr: Add psr1 live status
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9392/issues.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* ✓ Fi.CI.IGT: success for drm/i915/psr: Add psr1 live status (rev2)
2018-06-22 3:59 [PATCH] drm/i915/psr: Add psr1 live status vathsala nagaraju
2018-06-22 4:44 ` ✓ Fi.CI.BAT: success for drm/i915/psr: Add psr1 live status (rev2) Patchwork
@ 2018-06-22 12:57 ` Patchwork
2018-06-22 18:51 ` [PATCH] drm/i915/psr: Add psr1 live status Dhinakaran Pandiyan
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-06-22 12:57 UTC (permalink / raw)
To: vathsala nagaraju; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Add psr1 live status (rev2)
URL : https://patchwork.freedesktop.org/series/45143/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4368_full -> Patchwork_9392_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9392_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9392_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9392_full:
=== IGT changes ===
==== Warnings ====
igt@gem_mocs_settings@mocs-rc6-bsd1:
shard-kbl: SKIP -> PASS +1
igt@pm_rc6_residency@rc6-accuracy:
shard-kbl: PASS -> SKIP +1
== Known issues ==
Here are the changes found in Patchwork_9392_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_await@wide-contexts:
shard-apl: PASS -> FAIL (fdo#106680, fdo#105900)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-kbl: PASS -> FAIL (fdo#105363, fdo#102887)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
shard-glk: PASS -> FAIL (fdo#103375)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
shard-kbl: PASS -> FAIL (fdo#99912)
==== Possible fixes ====
igt@gem_workarounds@suspend-resume-context:
shard-apl: FAIL (fdo#103375) -> PASS +1
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-glk: FAIL (fdo#105363) -> PASS
igt@kms_flip@flip-vs-expired-vblank:
shard-glk: FAIL (fdo#102887) -> PASS
igt@kms_flip@modeset-vs-vblank-race-interruptible:
shard-glk: FAIL (fdo#103060) -> PASS
igt@kms_flip@plain-flip-fb-recreate-interruptible:
shard-glk: FAIL (fdo#100368) -> PASS +1
igt@kms_flip_tiling@flip-x-tiled:
shard-glk: FAIL (fdo#103822, fdo#104724) -> PASS +1
igt@perf_pmu@busy-idle-check-all-rcs0:
shard-snb: INCOMPLETE (fdo#105411) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4368 -> Patchwork_9392
CI_DRM_4368: f9f621dc095a8bfd2157fba018ddb542260d8daa @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4528: 6be300d405de5974b262e8b93a445be4ac618e6a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9392: 717c5cfed95ac3cf27eebdf934d00cf179523c5b @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9392/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm/i915/psr: Add psr1 live status
2018-06-22 3:59 [PATCH] drm/i915/psr: Add psr1 live status vathsala nagaraju
2018-06-22 4:44 ` ✓ Fi.CI.BAT: success for drm/i915/psr: Add psr1 live status (rev2) Patchwork
2018-06-22 12:57 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-06-22 18:51 ` Dhinakaran Pandiyan
2 siblings, 0 replies; 5+ messages in thread
From: Dhinakaran Pandiyan @ 2018-06-22 18:51 UTC (permalink / raw)
To: vathsala nagaraju, jani.nikula, intel-gfx; +Cc: Rodrigo Vivi
On Fri, 2018-06-22 at 09:29 +0530, vathsala nagaraju wrote:
> From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
>
> Prints live state of psr1.Extending the existing
> PSR2 live state function to cover psr1.
>
> Tested on KBL with psr2 and psr1 panel.
>
> v2: rebase
> v3: DK
> Rename psr2_live_status to psr_source_status.
> v4: DK
> Move EDP_PSR_STATUS_STATE_SHIFT below EDP_PSR_STATUS_STATE_MASK.
> Pass seq to psr_source_status, handle source status prints in
> psr_source_status.
> v5: Fixed CI warning messages
> v6:
> Remove extra space in the title before the colon.(DK)
> Rebase. (Jani)
> v7: use tabs for indenting the values.(Jani)
This made me go through the patch again, I'm afraid I see more
formatting (mostly) issues. Sorry for not noticing earlier.
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>
> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 72 ++++++++++++++++++++++++---
> ----------
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 49 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index c400f42..3941d85 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2597,27 +2597,55 @@ static int i915_guc_log_relay_release(struct
> inode *inode, struct file *file)
> .release = i915_guc_log_relay_release,
> };
>
> -static const char *psr2_live_status(u32 val)
> -{
> - static const char * const live_status[] = {
> - "IDLE",
> - "CAPTURE",
> - "CAPTURE_FS",
> - "SLEEP",
> - "BUFON_FW",
> - "ML_UP",
> - "SU_STANDBY",
> - "FAST_SLEEP",
> - "DEEP_SLEEP",
> - "BUF_ON",
> - "TG_ON"
> - };
> +static void
> +psr_source_status(struct drm_i915_private *dev_priv, struct seq_file
> *m)
> +{
> + u32 val, psr_status = 0;
unnecessary initialization.
>
> - val = (val & EDP_PSR2_STATUS_STATE_MASK) >>
> EDP_PSR2_STATUS_STATE_SHIFT;
> - if (val < ARRAY_SIZE(live_status))
> - return live_status[val];
> + if (dev_priv->psr.psr2_enabled) {
> + static const char * const live_status[] = {
> + "IDLE",
> + "CAPTURE",
> + "CAPTURE_FS",
> + "SLEEP",
> + "BUFON_FW",
> + "ML_UP",
> + "SU_STANDBY",
> + "FAST_SLEEP",
> + "DEEP_SLEEP",
> + "BUF_ON",
> + "TG_ON"
> + };
> + psr_status = I915_READ(EDP_PSR2_STATUS);
> + val = (psr_status & EDP_PSR2_STATUS_STATE_MASK) >>
^extra space here.
> + EDP_PSR2_STATUS_STATE_SHIFT;
> + if (val < ARRAY_SIZE(live_status)) {
> + seq_printf(m, "Source PSR status: %x[%s]\n",
0x%x [%s]
i.e., you're missing the 0x prefix to denote hex numerals and a space.
> psr_status,
> + live_status[val]);
> + return;
> + }
> + } else {
> + static const char * const live_status[] = {
> + "IDLE",
> + "SRDONACK",
> + "SRDENT",
> + "BUFOFF",
> + "BUFON",
> + "AUXACK",
> + "SRDOFFACK",
> + "SRDENT_ON",
> + };
> + psr_status = I915_READ(EDP_PSR_STATUS);
> + val = (psr_status & EDP_PSR_STATUS_STATE_MASK) >>
> + EDP_PSR_STATUS_STATE_SHIFT;
> + if (val < ARRAY_SIZE(live_status)) {
> + seq_printf(m, "Source PSR status: %x[%s]\n",
> psr_status,
> + live_status[val]);
> + return;
> + }
> + }
>
> - return "unknown";
> + seq_printf(m, "Source psr status: %x[%s]\n", psr_status,
^lower case is inconsistent with the
other debugs you are printing.
> "unknown");
> }
>
> static const char *psr_sink_status(u8 val)
> @@ -2681,12 +2709,8 @@ static int i915_edp_psr_status(struct seq_file
> *m, void *data)
>
> seq_printf(m, "Performance_Counter: %u\n", psrperf);
> }
> - if (dev_priv->psr.psr2_enabled) {
> - u32 psr2 = I915_READ(EDP_PSR2_STATUS);
>
> - seq_printf(m, "EDP_PSR2_STATUS: %x [%s]\n",
> - psr2, psr2_live_status(psr2));
> - }
> + psr_source_status(dev_priv, m);
>
> if (dev_priv->psr.enabled) {
> struct drm_dp_aux *aux = &dev_priv->psr.enabled-
> >aux;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index caad19f..4efad4d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4072,6 +4072,7 @@ enum {
>
> #define EDP_PSR_STATUS _MMIO(dev_priv
> ->psr_mmio_base + 0x40)
> #define EDP_PSR_STATUS_STATE_MASK (7 << 29)
> +#define EDP_PSR_STATUS_STATE_SHIFT 29
> #define EDP_PSR_STATUS_STATE_IDLE (0 << 29)
> #define EDP_PSR_STATUS_STATE_SRDONACK (1 << 29)
> #define EDP_PSR_STATUS_STATE_SRDENT (2 << 29)
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] drm/i915/psr : Add psr1 live status
@ 2018-04-27 6:24 vathsala nagaraju
2018-04-27 13:14 ` ✓ Fi.CI.IGT: success for drm/i915/psr : Add psr1 live status (rev2) Patchwork
0 siblings, 1 reply; 5+ messages in thread
From: vathsala nagaraju @ 2018-04-27 6:24 UTC (permalink / raw)
To: rodrigo.vivi, intel-gfx; +Cc: Dhinakaran Pandiyan
From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Prints live state of psr1.Extending the existing
PSR2 live state function to cover psr1.
Tested on KBL with psr2 and psr1 panel.
v2: rebase
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 67 ++++++++++++++++++++++++-------------
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 44 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cb1a804..1bf2245 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2580,25 +2580,42 @@ static int i915_guc_log_relay_release(struct inode *inode, struct file *file)
.release = i915_guc_log_relay_release,
};
-static const char *psr2_live_status(u32 val)
-{
- static const char * const live_status[] = {
- "IDLE",
- "CAPTURE",
- "CAPTURE_FS",
- "SLEEP",
- "BUFON_FW",
- "ML_UP",
- "SU_STANDBY",
- "FAST_SLEEP",
- "DEEP_SLEEP",
- "BUF_ON",
- "TG_ON"
- };
-
- val = (val & EDP_PSR2_STATUS_STATE_MASK) >> EDP_PSR2_STATUS_STATE_SHIFT;
- if (val < ARRAY_SIZE(live_status))
- return live_status[val];
+static const char *psr_live_status(bool is_psr2_enabled, u32 val)
+{
+ if (is_psr2_enabled) {
+ static const char * const live_status[] = {
+ "IDLE",
+ "CAPTURE",
+ "CAPTURE_FS",
+ "SLEEP",
+ "BUFON_FW",
+ "ML_UP",
+ "SU_STANDBY",
+ "FAST_SLEEP",
+ "DEEP_SLEEP",
+ "BUF_ON",
+ "TG_ON"
+ };
+ val = (val & EDP_PSR2_STATUS_STATE_MASK) >>
+ EDP_PSR2_STATUS_STATE_SHIFT;
+ if (val < ARRAY_SIZE(live_status))
+ return live_status[val];
+ } else {
+ static const char * const live_status[] = {
+ "IDLE",
+ "SRDONACK",
+ "SRDENT",
+ "BUFOFF",
+ "BUFON",
+ "AUXACK",
+ "SRDOFFACK",
+ "SRDENT_ON",
+ };
+ val = (val & EDP_PSR_STATUS_STATE_MASK) >>
+ EDP_PSR_STATUS_STATE_SHIFT;
+ if (val < ARRAY_SIZE(live_status))
+ return live_status[val];
+ }
return "unknown";
}
@@ -2631,6 +2648,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
enum pipe pipe;
bool enabled = false;
bool sink_support;
+ u32 psr_status;
if (!HAS_PSR(dev_priv))
return -ENODEV;
@@ -2698,12 +2716,13 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
seq_printf(m, "Performance_Counter: %u\n", psrperf);
}
- if (dev_priv->psr.psr2_enabled) {
- u32 psr2 = I915_READ(EDP_PSR2_STATUS);
- seq_printf(m, "EDP_PSR2_STATUS: %x [%s]\n",
- psr2, psr2_live_status(psr2));
- }
+ psr_status = (dev_priv->psr.psr2_enabled) ? I915_READ(EDP_PSR2_STATUS) :
+ I915_READ(EDP_PSR_STATUS);
+ seq_printf(m, "EDP_SOURCE_PSR%s_STATUS: %x [%s]\n",
+ dev_priv->psr.psr2_enabled ? "2" : "1",
+ psr_status,
+ psr_live_status(dev_priv->psr.psr2_enabled, psr_status));
if (dev_priv->psr.enabled) {
struct drm_dp_aux *aux = &dev_priv->psr.enabled->aux;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 391825a..2642b97 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4065,6 +4065,7 @@ enum {
#define EDP_PSR_STATUS_SENDING_TP2_TP3 (1<<8)
#define EDP_PSR_STATUS_SENDING_TP1 (1<<4)
#define EDP_PSR_STATUS_IDLE_MASK 0xf
+#define EDP_PSR_STATUS_STATE_SHIFT 29
#define EDP_PSR_PERF_CNT _MMIO(dev_priv->psr_mmio_base + 0x44)
#define EDP_PSR_PERF_CNT_MASK 0xffffff
--
1.9.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-06-22 18:25 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-22 3:59 [PATCH] drm/i915/psr: Add psr1 live status vathsala nagaraju
2018-06-22 4:44 ` ✓ Fi.CI.BAT: success for drm/i915/psr: Add psr1 live status (rev2) Patchwork
2018-06-22 12:57 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-22 18:51 ` [PATCH] drm/i915/psr: Add psr1 live status Dhinakaran Pandiyan
-- strict thread matches above, loose matches on Subject: below --
2018-04-27 6:24 [PATCH] drm/i915/psr : " vathsala nagaraju
2018-04-27 13:14 ` ✓ Fi.CI.IGT: success for drm/i915/psr : Add psr1 live status (rev2) Patchwork
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