[PATCH] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[PATCH] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Imre Deak]

During power domains initialization we acquire power well references for
power wells in the INIT power domain. The rest of power wells - which
BIOS could have left enabled - we can only acquire references as needed
during display HW readout. Thus during initialization these latter power
wells can have a refcount of 0 while still being enabled. To avoid the
false-positive state mismatch error this causes remove the check from
intel_power_domains_init_hw() and rely on the state check in
intel_power_domains_enable() which follows the HW readout.

Fixes: 6dfc4a8f134f ("drm/i915: Verify power domains after enabling them")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
References: https://bugs.freedesktop.org/show_bug.cgi?id=107411
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 2852395125cd..73d3a6ed3446 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3767,9 +3767,8 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume)
 	if (!i915_modparams.disable_power_well)
 		intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 	intel_power_domains_sync_hw(dev_priv);
+
 	power_domains->initializing = false;
-
-	intel_power_domains_verify_state(dev_priv);
 }
 
 /**
-- 
2.13.2

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Re: [PATCH] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Chris Wilson]

Quoting Imre Deak (2018-08-28 12:40:43)
> During power domains initialization we acquire power well references for
> power wells in the INIT power domain. The rest of power wells - which
> BIOS could have left enabled - we can only acquire references as needed
> during display HW readout. Thus during initialization these latter power
> wells can have a refcount of 0 while still being enabled. To avoid the
> false-positive state mismatch error this causes remove the check from
> intel_power_domains_init_hw() and rely on the state check in
> intel_power_domains_enable() which follows the HW readout.

Missing from above is a quick explanation of how those extraneous
powerwells are sanitizied. If we don't do the HW readout
(i915.disable_display?) do we not then leave the powerwell active and so
complain in a later verify_state()?
-Chris
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Re: [PATCH] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Imre Deak]

On Tue, Aug 28, 2018 at 12:45:31PM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2018-08-28 12:40:43)
> > During power domains initialization we acquire power well references for
> > power wells in the INIT power domain. The rest of power wells - which
> > BIOS could have left enabled - we can only acquire references as needed
> > during display HW readout. Thus during initialization these latter power
> > wells can have a refcount of 0 while still being enabled. To avoid the
> > false-positive state mismatch error this causes remove the check from
> > intel_power_domains_init_hw() and rely on the state check in
> > intel_power_domains_enable() which follows the HW readout.
> 
> Missing from above is a quick explanation of how those extraneous
> powerwells are sanitizied. If we don't do the HW readout
> (i915.disable_display?) do we not then leave the powerwell active and so
> complain in a later verify_state()?

These power wells (AUX and DDI on ICL) can only be enabled/disabled at
a specific spot in the modeset sequence, otherwise the power well
enable / disable operation will time out. That's the reason they're not
part of the INIT domain. For these we will acquire the references during
HW readout when noticing that the corresponding display HW block is active
and drop them when disabling these HW blocks (normally or as part of
display state sanitizatoionin). That way we'll ensure the proper spot
mentioned above for power well enabling/disabling.

--Imre
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Re: [PATCH] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Imre Deak]

On Tue, Aug 28, 2018 at 02:52:20PM +0300, Imre Deak wrote:
> On Tue, Aug 28, 2018 at 12:45:31PM +0100, Chris Wilson wrote:
> > Quoting Imre Deak (2018-08-28 12:40:43)
> > > During power domains initialization we acquire power well references for
> > > power wells in the INIT power domain. The rest of power wells - which
> > > BIOS could have left enabled - we can only acquire references as needed
> > > during display HW readout. Thus during initialization these latter power
> > > wells can have a refcount of 0 while still being enabled. To avoid the
> > > false-positive state mismatch error this causes remove the check from
> > > intel_power_domains_init_hw() and rely on the state check in
> > > intel_power_domains_enable() which follows the HW readout.
> > 
> > Missing from above is a quick explanation of how those extraneous
> > powerwells are sanitizied. If we don't do the HW readout
> > (i915.disable_display?) do we not then leave the powerwell active and so
> > complain in a later verify_state()?
> 
> These power wells (AUX and DDI on ICL) can only be enabled/disabled at
> a specific spot in the modeset sequence, otherwise the power well
> enable / disable operation will time out. That's the reason they're not
> part of the INIT domain. For these we will acquire the references during
> HW readout when noticing that the corresponding display HW block is active
> and drop them when disabling these HW blocks (normally or as part of
> display state sanitizatoionin). That way we'll ensure the proper spot
> mentioned above for power well enabling/disabling.

And that's also the reason why display HW readout had to be added back
for i915.disable_display .

--Imre
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Re: [PATCH] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Chris Wilson]

Quoting Imre Deak (2018-08-28 12:56:38)
> On Tue, Aug 28, 2018 at 02:52:20PM +0300, Imre Deak wrote:
> > On Tue, Aug 28, 2018 at 12:45:31PM +0100, Chris Wilson wrote:
> > > Quoting Imre Deak (2018-08-28 12:40:43)
> > > > During power domains initialization we acquire power well references for
> > > > power wells in the INIT power domain. The rest of power wells - which
> > > > BIOS could have left enabled - we can only acquire references as needed
> > > > during display HW readout. Thus during initialization these latter power
> > > > wells can have a refcount of 0 while still being enabled. To avoid the
> > > > false-positive state mismatch error this causes remove the check from
> > > > intel_power_domains_init_hw() and rely on the state check in
> > > > intel_power_domains_enable() which follows the HW readout.
> > > 
> > > Missing from above is a quick explanation of how those extraneous
> > > powerwells are sanitizied. If we don't do the HW readout
> > > (i915.disable_display?) do we not then leave the powerwell active and so
> > > complain in a later verify_state()?
> > 
> > These power wells (AUX and DDI on ICL) can only be enabled/disabled at
> > a specific spot in the modeset sequence, otherwise the power well
> > enable / disable operation will time out. That's the reason they're not
> > part of the INIT domain. For these we will acquire the references during
> > HW readout when noticing that the corresponding display HW block is active
> > and drop them when disabling these HW blocks (normally or as part of
> > display state sanitizatoionin). That way we'll ensure the proper spot
> > mentioned above for power well enabling/disabling.
> 
> And that's also the reason why display HW readout had to be added back
> for i915.disable_display .

Just add the snippet to the changelog: "...as needed during display HW
readout and so must defer sanitization until then (also implying that we
must always do HW readout to cleanup unused powerwells)."

A reminder in code as well:
/* powerwells are sanitized by i_forget_the_function_name() */
-Chris
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✓ Fi.CI.BAT: success for drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Patchwork]

== Series Details ==

Series: drm/i915: Don't check power domains state in intel_power_domains_init_hw()
URL   : https://patchwork.freedesktop.org/series/48794/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4714 -> Patchwork_10027 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/48794/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10027 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_guc:
      fi-skl-guc:         NOTRUN -> DMESG-WARN (fdo#107258, fdo#107175)

    igt@kms_frontbuffer_tracking@basic:
      {fi-byt-clapper}:   PASS -> FAIL (fdo#103167)

    
    ==== Possible fixes ====

    {igt@amdgpu/amd_prime@i915-to-amd}:
      fi-bxt-j4205:       INCOMPLETE (fdo#103927) -> SKIP

    igt@drv_selftest@live_hangcheck:
      fi-kbl-7567u:       DMESG-FAIL (fdo#106947, fdo#106560) -> PASS

    igt@kms_chamelium@dp-edid-read:
      fi-kbl-7500u:       FAIL (fdo#103841) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-blb-e6850:       INCOMPLETE -> PASS

    {igt@pm_rpm@module-reload}:
      fi-bxt-j4205:       DMESG-FAIL -> PASS

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         FAIL (fdo#104008) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
  fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
  fdo#107175 https://bugs.freedesktop.org/show_bug.cgi?id=107175
  fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258


== Participating hosts (53 -> 49) ==

  Additional (1): fi-skl-guc 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4714 -> Patchwork_10027

  CI_DRM_4714: 06fa287b780cfea38a1c599cc1fc3611262668cf @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4610: c40743d3fce5055682d31610519758dd7379c0f8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10027: c97f549cc54c33bb30dc825369511ac43b1921b2 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

c97f549cc54c drm/i915: Don't check power domains state in intel_power_domains_init_hw()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10027/issues.html
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[PATCH v2] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Imre Deak]

During power domains initialization we acquire power well references for
power wells in the INIT power domain. The rest of power wells - which
BIOS could have left enabled - we can only acquire references as needed
during display HW readout and so must defer sanitization until then
(also implying that we must always do HW readout to cleanup unused power
wells).

Thus during initialization these latter power wells can have a refcount
of 0 while still being enabled. To avoid the false-positive state
mismatch error this causes remove the check from
intel_power_domains_init_hw() and rely on the state check in
intel_power_domains_enable() which follows the HW readout.

v2:
- Add comment to log and code clarifying how unused power wells get
  disabled. (Chris)

Fixes: 6dfc4a8f134f ("drm/i915: Verify power domains after enabling them")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
References: https://bugs.freedesktop.org/show_bug.cgi?id=107411
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 2852395125cd..480dadb1047b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3724,9 +3724,10 @@ static void intel_power_domains_verify_state(struct drm_i915_private *dev_priv);
  *
  * This function initializes the hardware power domain state and enables all
  * power wells belonging to the INIT power domain. Power wells in other
- * domains (and not in the INIT domain) are referenced or disabled during the
- * modeset state HW readout. After that the reference count of each power well
- * must match its HW enabled state, see intel_power_domains_verify_state().
+ * domains (and not in the INIT domain) are referenced or disabled by
+ * intel_modeset_readout_hw_state(). After that the reference count of each
+ * power well must match its HW enabled state, see
+ * intel_power_domains_verify_state().
  *
  * It will return with power domains disabled (to be enabled later by
  * intel_power_domains_enable()) and must be paired with
@@ -3767,9 +3768,8 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume)
 	if (!i915_modparams.disable_power_well)
 		intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 	intel_power_domains_sync_hw(dev_priv);
+
 	power_domains->initializing = false;
-
-	intel_power_domains_verify_state(dev_priv);
 }
 
 /**
-- 
2.13.2

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Re: [PATCH v2] drm/i915: Don't check power domains state in intel_power_domains_init_hw()

[Chris Wilson]

Quoting Imre Deak (2018-08-28 13:22:31)
> During power domains initialization we acquire power well references for
> power wells in the INIT power domain. The rest of power wells - which
> BIOS could have left enabled - we can only acquire references as needed
> during display HW readout and so must defer sanitization until then
> (also implying that we must always do HW readout to cleanup unused power
> wells).
> 
> Thus during initialization these latter power wells can have a refcount
> of 0 while still being enabled. To avoid the false-positive state
> mismatch error this causes remove the check from
> intel_power_domains_init_hw() and rely on the state check in
> intel_power_domains_enable() which follows the HW readout.
> 
> v2:
> - Add comment to log and code clarifying how unused power wells get
>   disabled. (Chris)
> 
> Fixes: 6dfc4a8f134f ("drm/i915: Verify power domains after enabling them")
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=107411
> Signed-off-by: Imre Deak <imre.deak@intel.com>

That's enough to allow me to keep following along,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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✓ Fi.CI.BAT: success for drm/i915: Don't check power domains state in intel_power_domains_init_hw() (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Don't check power domains state in intel_power_domains_init_hw() (rev2)
URL   : https://patchwork.freedesktop.org/series/48794/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4714 -> Patchwork_10028 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/48794/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10028 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    {igt@amdgpu/amd_basic@userptr}:
      {fi-kbl-8809g}:     PASS -> INCOMPLETE (fdo#107402)

    igt@drv_selftest@live_guc:
      fi-skl-guc:         NOTRUN -> DMESG-WARN (fdo#107175, fdo#107258)

    igt@drv_selftest@live_hangcheck:
      fi-kbl-guc:         PASS -> DMESG-FAIL (fdo#106947, fdo#107710)

    igt@kms_pipe_crc_basic@read-crc-pipe-b:
      {fi-byt-clapper}:   PASS -> FAIL (fdo#107362) +1

    
    ==== Possible fixes ====

    {igt@amdgpu/amd_prime@i915-to-amd}:
      fi-bxt-j4205:       INCOMPLETE (fdo#103927) -> SKIP

    igt@drv_selftest@live_hangcheck:
      fi-kbl-7567u:       DMESG-FAIL (fdo#106947, fdo#106560) -> PASS

    igt@kms_chamelium@dp-edid-read:
      fi-kbl-7500u:       FAIL (fdo#103841) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-blb-e6850:       INCOMPLETE -> PASS

    {igt@pm_rpm@module-reload}:
      fi-bxt-j4205:       DMESG-FAIL (fdo#107712) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
  fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
  fdo#107175 https://bugs.freedesktop.org/show_bug.cgi?id=107175
  fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107402 https://bugs.freedesktop.org/show_bug.cgi?id=107402
  fdo#107710 https://bugs.freedesktop.org/show_bug.cgi?id=107710
  fdo#107712 https://bugs.freedesktop.org/show_bug.cgi?id=107712


== Participating hosts (53 -> 49) ==

  Additional (1): fi-skl-guc 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4714 -> Patchwork_10028

  CI_DRM_4714: 06fa287b780cfea38a1c599cc1fc3611262668cf @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4610: c40743d3fce5055682d31610519758dd7379c0f8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10028: 51662a027a87f68fb7fb910b64c83adc91fa4dcb @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

51662a027a87 drm/i915: Don't check power domains state in intel_power_domains_init_hw()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10028/issues.html
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✓ Fi.CI.IGT: success for drm/i915: Don't check power domains state in intel_power_domains_init_hw() (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Don't check power domains state in intel_power_domains_init_hw() (rev2)
URL   : https://patchwork.freedesktop.org/series/48794/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4714_full -> Patchwork_10028_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_10028_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_suspend@shrink:
      shard-kbl:          PASS -> INCOMPLETE (fdo#106886, fdo#103665)

    igt@gem_ppgtt@blt-vs-render-ctx0:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665, fdo#106023)

    
    ==== Possible fixes ====

    igt@gem_ctx_isolation@vcs0-s3:
      shard-kbl:          INCOMPLETE (fdo#103665, fdo#107556) -> PASS

    igt@kms_setmode@basic:
      shard-apl:          FAIL (fdo#99912) -> PASS

    igt@perf@blocking:
      shard-hsw:          FAIL (fdo#102252) -> PASS

    
  fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
  fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4714 -> Patchwork_10028

  CI_DRM_4714: 06fa287b780cfea38a1c599cc1fc3611262668cf @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4610: c40743d3fce5055682d31610519758dd7379c0f8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10028: 51662a027a87f68fb7fb910b64c83adc91fa4dcb @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10028/shards.html
_______________________________________________
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Re: ✓ Fi.CI.IGT: success for drm/i915: Don't check power domains state in intel_power_domains_init_hw() (rev2)

[Imre Deak]

On Tue, Aug 28, 2018 at 01:49:01PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Don't check power domains state in intel_power_domains_init_hw() (rev2)
> URL   : https://patchwork.freedesktop.org/series/48794/
> State : success

Pushed to -dinq, thanks for the review.

> 
> == Summary ==
> 
> = CI Bug Log - changes from CI_DRM_4714_full -> Patchwork_10028_full =
> 
> == Summary - SUCCESS ==
> 
>   No regressions found.
> 
>   
> 
> == Known issues ==
> 
>   Here are the changes found in Patchwork_10028_full that come from known issues:
> 
>   === IGT changes ===
> 
>     ==== Issues hit ====
> 
>     igt@drv_suspend@shrink:
>       shard-kbl:          PASS -> INCOMPLETE (fdo#106886, fdo#103665)
> 
>     igt@gem_ppgtt@blt-vs-render-ctx0:
>       shard-kbl:          PASS -> INCOMPLETE (fdo#103665, fdo#106023)
> 
>     
>     ==== Possible fixes ====
> 
>     igt@gem_ctx_isolation@vcs0-s3:
>       shard-kbl:          INCOMPLETE (fdo#103665, fdo#107556) -> PASS
> 
>     igt@kms_setmode@basic:
>       shard-apl:          FAIL (fdo#99912) -> PASS
> 
>     igt@perf@blocking:
>       shard-hsw:          FAIL (fdo#102252) -> PASS
> 
>     
>   fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
>   fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
>   fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
>   fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556
>   fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
> 
> 
> == Participating hosts (5 -> 5) ==
> 
>   No changes in participating hosts
> 
> 
> == Build changes ==
> 
>     * Linux: CI_DRM_4714 -> Patchwork_10028
> 
>   CI_DRM_4714: 06fa287b780cfea38a1c599cc1fc3611262668cf @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4610: c40743d3fce5055682d31610519758dd7379c0f8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_10028: 51662a027a87f68fb7fb910b64c83adc91fa4dcb @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10028/shards.html
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