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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 1/7] drm/i915/psr: Share PSR and PSR2 exit mask
Date: Wed, 26 Sep 2018 12:24:21 -0700	[thread overview]
Message-ID: <20180926192427.16352-1-jose.souza@intel.com> (raw)

Now both PSR and PSR2 have the same exit mask, so let's share then
instead of have the same code 2 times.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 34 ++++++++++++--------------------
 1 file changed, 13 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index b6838b525502..358bbcd3b5f3 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -575,28 +575,20 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 		else
 			chicken &= ~VSC_DATA_SEL_SOFTWARE_CONTROL;
 		I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);
-
-		I915_WRITE(EDP_PSR_DEBUG,
-			   EDP_PSR_DEBUG_MASK_MEMUP |
-			   EDP_PSR_DEBUG_MASK_HPD |
-			   EDP_PSR_DEBUG_MASK_LPSP |
-			   EDP_PSR_DEBUG_MASK_MAX_SLEEP |
-			   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);
-	} else {
-		/*
-		 * Per Spec: Avoid continuous PSR exit by masking MEMUP
-		 * and HPD. also mask LPSP to avoid dependency on other
-		 * drivers that might block runtime_pm besides
-		 * preventing  other hw tracking issues now we can rely
-		 * on frontbuffer tracking.
-		 */
-		I915_WRITE(EDP_PSR_DEBUG,
-			   EDP_PSR_DEBUG_MASK_MEMUP |
-			   EDP_PSR_DEBUG_MASK_HPD |
-			   EDP_PSR_DEBUG_MASK_LPSP |
-			   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
-			   EDP_PSR_DEBUG_MASK_MAX_SLEEP);
 	}
+
+	/*
+	 * Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD also
+	 * mask LPSP to avoid dependency on other drivers that might block
+	 * runtime_pm besides preventing  other hw tracking issues now we
+	 * can rely on frontbuffer tracking.
+	 */
+	I915_WRITE(EDP_PSR_DEBUG,
+		   EDP_PSR_DEBUG_MASK_MEMUP |
+		   EDP_PSR_DEBUG_MASK_HPD |
+		   EDP_PSR_DEBUG_MASK_LPSP |
+		   EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
+		   EDP_PSR_DEBUG_MASK_MAX_SLEEP);
 }
 
 static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
-- 
2.19.0

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             reply	other threads:[~2018-09-26 19:25 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-26 19:24 José Roberto de Souza [this message]
2018-09-26 19:24 ` [PATCH v2 2/7] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL José Roberto de Souza
2018-09-26 19:24 ` [PATCH v2 3/7] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch José Roberto de Souza
2018-09-27 22:38   ` Dhinakaran Pandiyan
2018-09-27 22:44   ` Dhinakaran Pandiyan
2018-09-26 19:24 ` [PATCH v2 4/7] drm/i915/psr: Remove PSR2 TODO error handling José Roberto de Souza
2018-09-26 19:24 ` [PATCH v2 5/7] drm/i915/psr: Use WA to force HW tracking to exit PSR2 José Roberto de Souza
2018-09-26 19:24 ` [PATCH v2 6/7] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-09-27 22:36   ` Dhinakaran Pandiyan
2018-09-26 19:24 ` [PATCH v2 7/7] drm/i915/psr: Remove alpm from i915_psr José Roberto de Souza
2018-09-26 19:55 ` ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/7] drm/i915/psr: Share PSR and PSR2 exit mask Patchwork
2018-09-26 20:12 ` ✗ Fi.CI.BAT: failure " Patchwork

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