From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: [PATCH v2 3/7] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch
Date: Wed, 26 Sep 2018 12:24:23 -0700 [thread overview]
Message-ID: <20180926192427.16352-3-jose.souza@intel.com> (raw)
In-Reply-To: <20180926192427.16352-1-jose.souza@intel.com>
eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.
v2(Dhinakaran): Using else of dev_priv->psr.psr2_enabled to set
DP_PSR_CRC_VERIFICATION
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 5af22e3522f8..fadcc29e7518 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -340,13 +340,12 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
if (dev_priv->psr.psr2_enabled) {
drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
DP_ALPM_ENABLE);
- dpcd_val |= DP_PSR_ENABLE_PSR2;
- }
+ dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
+ } else if (INTEL_GEN(dev_priv) >= 8)
+ dpcd_val |= DP_PSR_CRC_VERIFICATION;
if (dev_priv->psr.link_standby)
dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
- if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
- dpcd_val |= DP_PSR_CRC_VERIFICATION;
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
--
2.19.0
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next prev parent reply other threads:[~2018-09-26 19:25 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-26 19:24 [PATCH v2 1/7] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
2018-09-26 19:24 ` [PATCH v2 2/7] drm/i915/psr: Make MASK_DISP_REG_WRITE reserved in PSR_MASK for ICL José Roberto de Souza
2018-09-26 19:24 ` José Roberto de Souza [this message]
2018-09-27 22:38 ` [PATCH v2 3/7] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch Dhinakaran Pandiyan
2018-09-27 22:44 ` Dhinakaran Pandiyan
2018-09-26 19:24 ` [PATCH v2 4/7] drm/i915/psr: Remove PSR2 TODO error handling José Roberto de Souza
2018-09-26 19:24 ` [PATCH v2 5/7] drm/i915/psr: Use WA to force HW tracking to exit PSR2 José Roberto de Souza
2018-09-26 19:24 ` [PATCH v2 6/7] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-09-27 22:36 ` Dhinakaran Pandiyan
2018-09-26 19:24 ` [PATCH v2 7/7] drm/i915/psr: Remove alpm from i915_psr José Roberto de Souza
2018-09-26 19:55 ` ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/7] drm/i915/psr: Share PSR and PSR2 exit mask Patchwork
2018-09-26 20:12 ` ✗ Fi.CI.BAT: failure " Patchwork
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