From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: [PATCH 2/4] drm/i915/icl: No need to ack intr through master control
Date: Tue, 2 Oct 2018 17:05:50 +0300 [thread overview]
Message-ID: <20181002140552.1051-2-mika.kuoppala@linux.intel.com> (raw)
In-Reply-To: <20181002140552.1051-1-mika.kuoppala@linux.intel.com>
All other master control register bits, except the enable,
are read only and they are level indications of the second
level interrupt status. Only touch enable bit and rectify
the comment.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index cbc04dd59041..e0310ebd9c8d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3165,8 +3165,8 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl);
- /* Acknowledge and enable interrupts. */
- raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl);
+ /* Enable interrupts. */
+ raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
gen11_gu_misc_irq_handler(i915, gu_misc_iir);
--
2.17.1
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next prev parent reply other threads:[~2018-10-02 14:07 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-02 14:05 [PATCH 1/4] drm/i915/gen8: Disable master intr before reading Mika Kuoppala
2018-10-02 14:05 ` Mika Kuoppala [this message]
2018-10-12 11:12 ` [PATCH 2/4] drm/i915/icl: No need to ack intr through master control Matthew Auld
2018-10-02 14:05 ` [PATCH 3/4] drm/i915/icl: Disable master intr before reading Mika Kuoppala
2018-10-02 15:18 ` Chris Wilson
2018-10-02 14:05 ` [PATCH 4/4] drm/i915/icl: Handle GT interrupts after enabling master Mika Kuoppala
2018-10-02 15:21 ` Chris Wilson
2018-10-11 14:19 ` Mika Kuoppala
2018-10-11 14:56 ` Chris Wilson
2018-10-02 14:38 ` ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/gen8: Disable master intr before reading Patchwork
2018-10-02 15:17 ` [PATCH 1/4] " Chris Wilson
2018-10-03 6:29 ` ✗ Fi.CI.IGT: failure for series starting with [1/4] " Patchwork
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