From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/4] drm/i915/icl: Handle GT interrupts after enabling master
Date: Thu, 11 Oct 2018 17:19:24 +0300 [thread overview]
Message-ID: <87woqoin0z.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <153849366657.23109.2500882356632814228@skylake-alporthouse-com>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Quoting Mika Kuoppala (2018-10-02 15:05:52)
>> Don't keep master disabled while we handle the current
>> interrupts. This should help a little on latency of
>> generating the next interrupt.
>>
>> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_irq.c | 4 +---
>> 1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 5d1f53723388..9d8d5fb68c84 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -3163,9 +3163,6 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>> return IRQ_NONE;
>> }
>>
>> - /* Find, clear, then process each source of interrupt. */
>> - gen11_gt_irq_handler(i915, master_ctl);
>> -
>> /* IRQs are synced during runtime_suspend, we don't require a wakeref */
>> if (master_ctl & GEN11_DISPLAY_IRQ) {
>> const u32 disp_ctl = raw_reg_read(regs, GEN11_DISPLAY_INT_CTL);
>> @@ -3183,6 +3180,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>>
>> gen11_master_intr_enable(regs);
>>
>> + gen11_gt_irq_handler(i915, master_ctl);
>
> Are we not still acking GT_INTR_DW at this point?
We are.
-Mika
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next prev parent reply other threads:[~2018-10-11 14:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-02 14:05 [PATCH 1/4] drm/i915/gen8: Disable master intr before reading Mika Kuoppala
2018-10-02 14:05 ` [PATCH 2/4] drm/i915/icl: No need to ack intr through master control Mika Kuoppala
2018-10-12 11:12 ` Matthew Auld
2018-10-02 14:05 ` [PATCH 3/4] drm/i915/icl: Disable master intr before reading Mika Kuoppala
2018-10-02 15:18 ` Chris Wilson
2018-10-02 14:05 ` [PATCH 4/4] drm/i915/icl: Handle GT interrupts after enabling master Mika Kuoppala
2018-10-02 15:21 ` Chris Wilson
2018-10-11 14:19 ` Mika Kuoppala [this message]
2018-10-11 14:56 ` Chris Wilson
2018-10-02 14:38 ` ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/gen8: Disable master intr before reading Patchwork
2018-10-02 15:17 ` [PATCH 1/4] " Chris Wilson
2018-10-03 6:29 ` ✗ Fi.CI.IGT: failure for series starting with [1/4] " Patchwork
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