From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: [PATCH v3 04/10] drm/i915: Avoid a full port detection in the first eDP short pulse
Date: Thu, 25 Oct 2018 18:17:31 -0700 [thread overview]
Message-ID: <20181026011737.23684-4-jose.souza@intel.com> (raw)
In-Reply-To: <20181026011737.23684-1-jose.souza@intel.com>
Some eDP panels do not set a valid sink count value and even for the
ones that sets is should always be one for eDP, that is why it is not
cached in intel_edp_init_dpcd().
But intel_dp_short_pulse() compares the old count with the read one
if there is a mistmatch a full port detection will be executed, what
was happening in the first short pulse interruption of eDP panels
that sets sink count.
Instead of just skip the compasison for eDP panels, lets not read
the sink count at all for eDP.
v2: the previous version of this patch was caching the sink count
in intel_edp_init_dpcd() but I was pointed out by Ville a patch that
handled a case of a eDP panel that do not set sink count
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 44 +++++++++++++++++++--------------
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8e64f149ab09..fce67094c2a0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4039,8 +4039,6 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
static bool
intel_dp_get_dpcd(struct intel_dp *intel_dp)
{
- u8 sink_count;
-
if (!intel_dp_read_dpcd(intel_dp))
return false;
@@ -4050,25 +4048,35 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
intel_dp_set_common_rates(intel_dp);
}
- if (drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &sink_count) <= 0)
- return false;
-
/*
- * Sink count can change between short pulse hpd hence
- * a member variable in intel_dp will track any changes
- * between short pulse interrupts.
+ * Some eDP panels do not set a valid value for sink count, that is why
+ * it don't care about read it here and in intel_edp_init_dpcd().
*/
- intel_dp->sink_count = DP_GET_SINK_COUNT(sink_count);
+ if (!intel_dp_is_edp(intel_dp)) {
+ u8 count;
+ ssize_t r;
- /*
- * SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
- * a dongle is present but no display. Unless we require to know
- * if a dongle is present or not, we don't need to update
- * downstream port information. So, an early return here saves
- * time from performing other operations which are not required.
- */
- if (!intel_dp_is_edp(intel_dp) && !intel_dp->sink_count)
- return false;
+ r = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &count);
+ if (r < 1)
+ return false;
+
+ /*
+ * Sink count can change between short pulse hpd hence
+ * a member variable in intel_dp will track any changes
+ * between short pulse interrupts.
+ */
+ intel_dp->sink_count = DP_GET_SINK_COUNT(count);
+
+ /*
+ * SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
+ * a dongle is present but no display. Unless we require to know
+ * if a dongle is present or not, we don't need to update
+ * downstream port information. So, an early return here saves
+ * time from performing other operations which are not required.
+ */
+ if (!intel_dp->sink_count)
+ return false;
+ }
if (!drm_dp_is_branch(intel_dp->dpcd))
return true; /* native DP sink */
--
2.19.1
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next prev parent reply other threads:[~2018-10-26 1:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-26 1:17 [PATCH v3 01/10] drm/i915/psr: Use intel_psr_exit() in intel_psr_disable_source() José Roberto de Souza
2018-10-26 1:17 ` [PATCH v3 02/10] drm/i915/psr: Always wait for idle state when disabling PSR José Roberto de Souza
2018-10-26 16:45 ` Rodrigo Vivi
2018-10-26 17:10 ` Souza, Jose
2018-10-26 1:17 ` [PATCH v3 03/10] drm/i915/psr: Move intel_psr_disable_source() code to intel_psr_disable_locked() José Roberto de Souza
2018-10-26 1:17 ` José Roberto de Souza [this message]
2018-10-26 1:17 ` [PATCH v3 05/10] drm/i915: Check PSR errors instead of retrain while PSR is enabled José Roberto de Souza
2018-10-26 1:17 ` [PATCH v3 06/10] drm/i915: Unmask PSR interruptions before assert IIR José Roberto de Souza
2018-10-26 17:06 ` Ville Syrjälä
2018-10-26 1:17 ` [PATCH v3 07/10] drm/i915/icl: Reset PSR interruptions José Roberto de Souza
2018-10-26 17:13 ` Ville Syrjälä
2018-10-26 1:17 ` [PATCH v3 08/10] drm/i915: Disable PSR when a PSR aux error happen José Roberto de Souza
2018-10-26 1:17 ` [PATCH v3 09/10] drm/i915: Keep PSR disabled after a driver reload after a PSR error José Roberto de Souza
2018-10-26 17:53 ` Souza, Jose
2018-10-26 18:01 ` Ville Syrjälä
2018-10-26 19:34 ` Souza, Jose
2018-10-29 11:18 ` Ville Syrjälä
2018-10-31 23:45 ` Dhinakaran Pandiyan
2018-11-06 0:00 ` Souza, Jose
2018-10-26 1:17 ` [PATCH v3 10/10] drm/i915: Do not enable PSR in the next modeset after a error José Roberto de Souza
2018-10-26 1:26 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,01/10] drm/i915/psr: Use intel_psr_exit() in intel_psr_disable_source() Patchwork
2018-10-26 1:29 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-26 1:47 ` ✗ Fi.CI.BAT: failure " Patchwork
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