Re: [PATCH 1/5] drm/i915/icl: Fix combo PHY uninit

[Imre Deak <imre.deak@intel.com>]

On Fri, Nov 02, 2018 at 10:57:19PM +0200, Souza, Jose wrote:
> On Fri, 2018-11-02 at 20:07 +0200, Imre Deak wrote:
> > BSpec says to clear the comp init HW flag too during combo PHY
> > uninit,
> > so do that. The lack of this could badly interact with the PHY reinit
> > after a DC6/9 transition at least, where (after a follow-up patch
> > fixing
> > the init code) we'd skip the initialization incorrectly due to this
> > flag
> > being set.
> > 
> > BSpec: 21257
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.c
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 6c453366cd24..a7eea8423580 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -3668,6 +3668,10 @@ void icl_display_core_uninit(struct
> > drm_i915_private *dev_priv)
> >  		val = I915_READ(ICL_PHY_MISC(port));
> >  		val |= ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;
> >  		I915_WRITE(ICL_PHY_MISC(port), val);
> > +
> > +		val = I915_READ(ICL_PORT_COMP_DW0(port));
> > +		val &= ~COMP_INIT;
> > +		I915_WRITE(ICL_PORT_COMP_DW0(port), val);
> 
> As DDIA PHY is the master maybe would be more safe clear it by last?

AFAIK that only means that the slave copies some calibration data from
the master during initialization and the spec doesn't require any order
here either. Perhaps it would still be better to keep the reverse order
in any case, but that should be a separate change as we already disabled
them in this order so far.

> 
> Other than that:
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> 
> >  	}
> >  }
> >  
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