Re: [PATCH 1/4] drm/i915: Fix GEN9 HDCP1.4 key load process

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Nov 27, 2018 at 07:32:56PM +0530, Ramalingam C wrote:
> HDCP1.4 key load process varies between Intel platform to platform.
> 
> For Gen9 platforms except BXT and GLK, HDCP1.4 key is loaded using
> the GT Driver Mailbox interface. Instead of listing all the platforms
> for this method, adopted this method for all Gen9 platforms with
> exceptions. In this way we need not extent check for new GEN9 platforms
> like CFL.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_hdcp.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c
> index 1bf487f94254..beacfbb6e5e1 100644
> --- a/drivers/gpu/drm/i915/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> @@ -157,10 +157,12 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
>  	/*
>  	 * Initiate loading the HDCP key from fuses.
>  	 *
> -	 * BXT+ platforms, HDCP key needs to be loaded by SW. Only SKL and KBL
> -	 * differ in the key load trigger process from other platforms.
> +	 * BXT+ platforms, HDCP key needs to be loaded by SW. Only Gen 9
> +	 * platforms except BXT and GLK, differ in the key load trigger process
> +	 * from other platforms.
>  	 */
> -	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> +	if (IS_GEN9(dev_priv) &&
> +	    (!IS_BROXTON(dev_priv) && !IS_GEMINILAKE(dev_priv))) {

IS_GEN9_BC()

>  		mutex_lock(&dev_priv->pcu_lock);
>  		ret = sandybridge_pcode_write(dev_priv,
>  					      SKL_PCODE_LOAD_HDCP_KEYS, 1);
> -- 
> 2.7.4
> 
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-- 
Ville Syrjälä
Intel
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