From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 4/9] drm/i915: Fix > vs >= mismatch in watermark/ddb calculations
Date: Fri, 21 Dec 2018 19:14:31 +0200 [thread overview]
Message-ID: <20181221171436.8218-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20181221171436.8218-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bspec says we have to reject the watermark if it's >= the ddb
allocation. Fix the code to reject the == case as it should.
For transition watermarks we can just use >=, for the rest
we'll do +1 when calculating the minimum ddb allocation size.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 55a1c577f060..3c5cba31f055 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4371,8 +4371,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
continue;
wm = &cstate->wm.skl.optimal.planes[plane_id];
- blocks += wm->wm[level].plane_res_b;
- blocks += wm->uv_wm[level].plane_res_b;
+ blocks += wm->wm[level].plane_res_b + 1;
+ blocks += wm->uv_wm[level].plane_res_b + 1;
}
if (blocks < alloc_size) {
@@ -4413,7 +4413,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
- total[plane_id] = wm->wm[level].plane_res_b + extra;
+ total[plane_id] = wm->wm[level].plane_res_b + 1 + extra;
alloc_size -= extra;
total_data_rate -= rate;
@@ -4424,7 +4424,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
- uv_total[plane_id] = wm->uv_wm[level].plane_res_b + extra;
+ uv_total[plane_id] = wm->uv_wm[level].plane_res_b + 1 + extra;
alloc_size -= extra;
total_data_rate -= rate;
}
@@ -4477,7 +4477,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
*/
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
wm = &cstate->wm.skl.optimal.planes[plane_id];
- if (wm->trans_wm.plane_res_b > total[plane_id])
+ if (wm->trans_wm.plane_res_b >= total[plane_id])
memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
}
--
2.19.2
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next prev parent reply other threads:[~2018-12-21 17:14 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-21 17:14 [PATCH 0/9] skl+ watermark stuff Ville Syrjala
2018-12-21 17:14 ` [PATCH 1/9] drm/i915: Don't ignore level 0 lines watermark for glk+ Ville Syrjala
2019-01-28 8:40 ` Lisovskiy, Stanislav
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 2/9] drm/i915: Reinstate an early latency==0 check for skl+ Ville Syrjala
2019-01-28 8:34 ` Lisovskiy, Stanislav
2019-01-29 23:54 ` Matt Roper
2019-01-30 14:25 ` Ville Syrjälä
2018-12-21 17:14 ` [PATCH 3/9] drm/i915: Fix bits vs. bytes mixup in dbuf block size computation Ville Syrjala
2019-01-28 8:43 ` Lisovskiy, Stanislav
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` Ville Syrjala [this message]
2019-01-29 23:54 ` [PATCH 4/9] drm/i915: Fix > vs >= mismatch in watermark/ddb calculations Matt Roper
2018-12-21 17:14 ` [PATCH 5/9] drm/i915: Account for minimum ddb allocation restrictions Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 6/9] drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 7/9] drm/i915: Drop the definite article in front of SAGV Ville Syrjala
2018-12-21 17:40 ` Rodrigo Vivi
2018-12-21 17:14 ` [PATCH 8/9] drm/i915: Drop the pointless linetime==0 check Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 9/9] drm/i915: Use IS_GEN9_LP() for the linetime w/a check Ville Syrjala
2018-12-21 17:39 ` Rodrigo Vivi
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:49 ` ✗ Fi.CI.SPARSE: warning for skl+ watermark stuff Patchwork
2018-12-21 18:05 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-21 23:15 ` ✓ Fi.CI.IGT: " Patchwork
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