From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/9] drm/i915: Fix bits vs. bytes mixup in dbuf block size computation
Date: Mon, 28 Jan 2019 08:43:09 +0000 [thread overview]
Message-ID: <7d932218ef78e49a562620e87c8edad25f7b6c1c.camel@intel.com> (raw)
In-Reply-To: <20181221171436.8218-4-ville.syrjala@linux.intel.com>
On Fri, 2018-12-21 at 19:14 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The spec used to say "8bpp" which someone took to mean 8 bytes per
> pixel when in fact it was supposed to be 8 bits per pixel. The
> spec has been updated to make it more clear now. Fix the code
> to match.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 0aac7e7b660f..55a1c577f060 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4618,7 +4618,7 @@ skl_compute_plane_wm_params(const struct
> intel_crtc_state *cstate,
> intel_p
> state);
>
> if (INTEL_GEN(dev_priv) >= 11 &&
> - fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp ==
> 8)
> + fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp ==
> 1)
> wp->dbuf_block_size = 256;
> else
> wp->dbuf_block_size = 512;
Interesting how this small misunderstanding could affect our bugs
previously.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
--
Best Regards,
Lisovskiy Stanislav
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next prev parent reply other threads:[~2019-01-28 8:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-21 17:14 [PATCH 0/9] skl+ watermark stuff Ville Syrjala
2018-12-21 17:14 ` [PATCH 1/9] drm/i915: Don't ignore level 0 lines watermark for glk+ Ville Syrjala
2019-01-28 8:40 ` Lisovskiy, Stanislav
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 2/9] drm/i915: Reinstate an early latency==0 check for skl+ Ville Syrjala
2019-01-28 8:34 ` Lisovskiy, Stanislav
2019-01-29 23:54 ` Matt Roper
2019-01-30 14:25 ` Ville Syrjälä
2018-12-21 17:14 ` [PATCH 3/9] drm/i915: Fix bits vs. bytes mixup in dbuf block size computation Ville Syrjala
2019-01-28 8:43 ` Lisovskiy, Stanislav [this message]
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 4/9] drm/i915: Fix > vs >= mismatch in watermark/ddb calculations Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 5/9] drm/i915: Account for minimum ddb allocation restrictions Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 6/9] drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 7/9] drm/i915: Drop the definite article in front of SAGV Ville Syrjala
2018-12-21 17:40 ` Rodrigo Vivi
2018-12-21 17:14 ` [PATCH 8/9] drm/i915: Drop the pointless linetime==0 check Ville Syrjala
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:14 ` [PATCH 9/9] drm/i915: Use IS_GEN9_LP() for the linetime w/a check Ville Syrjala
2018-12-21 17:39 ` Rodrigo Vivi
2019-01-29 23:54 ` Matt Roper
2018-12-21 17:49 ` ✗ Fi.CI.SPARSE: warning for skl+ watermark stuff Patchwork
2018-12-21 18:05 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-21 23:15 ` ✓ Fi.CI.IGT: " Patchwork
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