From: Patchwork <patchwork@emeril.freedesktop.org>
To: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs
Date: Thu, 31 Jan 2019 21:22:05 -0000 [thread overview]
Message-ID: <20190131212205.28477.76248@emeril.freedesktop.org> (raw)
In-Reply-To: <20190131211046.18603-1-gwan-gyeong.mun@intel.com>
== Series Details ==
Series: drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs
URL : https://patchwork.freedesktop.org/series/56059/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
646f25f459f0 drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11
-:20: WARNING:TABSTOP: Statements should start on a tabstop
#20: FILE: drivers/gpu/drm/i915/intel_dp.c:6926:
+ if (INTEL_GEN(dev_priv) >= 11)
total: 0 errors, 1 warnings, 0 checks, 9 lines checked
485e788bfeee drm/i915/dp: Add a config function for YCBCR420 outputs
bfebbc7e2acb drm: Add a VSC structure for handling Pixel Encoding/Colorimetry Formats
2b312268f5ba drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format
-:44: ERROR:TRAILING_STATEMENTS: trailing statements should be on next line
#44: FILE: drivers/gpu/drm/i915/intel_dp.c:4412:
+ if (!intel_dp->attached_connector->base.ycbcr_420_allowed) return;
total: 1 errors, 0 warnings, 0 checks, 93 lines checked
317c3a0c98c6 drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSA
-:41: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#41: FILE: drivers/gpu/drm/i915/intel_ddi.c:1740:
+ * indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
+ */
total: 0 errors, 1 warnings, 0 checks, 21 lines checked
49b8aff26fa2 drm/i915/dp: Update pipe_bpp for DP YCbCr4:2:0 outputs
-:54: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#54: FILE: drivers/gpu/drm/i915/intel_dp.c:1770:
+ bpp = min(bpp, 3*bpc/bpp_divider);
^
-:54: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#54: FILE: drivers/gpu/drm/i915/intel_dp.c:1770:
+ bpp = min(bpp, 3*bpc/bpp_divider);
^
total: 0 errors, 0 warnings, 2 checks, 119 lines checked
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next prev parent reply other threads:[~2019-01-31 21:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-31 21:10 [RFC 0/6] drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs Gwan-gyeong Mun
2019-01-31 21:10 ` [RFC 1/6] drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11 Gwan-gyeong Mun
2019-02-08 15:24 ` Maarten Lankhorst
2019-02-21 18:48 ` Mun, Gwan-gyeong
2019-01-31 21:10 ` [RFC 2/6] drm/i915/dp: Add a config function for YCBCR420 outputs Gwan-gyeong Mun
2019-01-31 21:10 ` [RFC 3/6] drm: Add a VSC structure for handling Pixel Encoding/Colorimetry Formats Gwan-gyeong Mun
2019-01-31 21:10 ` [RFC 4/6] drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format Gwan-gyeong Mun
2019-02-08 15:31 ` Maarten Lankhorst
2019-02-21 19:14 ` Mun, Gwan-gyeong
2019-01-31 21:10 ` [RFC 5/6] drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSA Gwan-gyeong Mun
2019-01-31 21:10 ` [RFC 6/6] drm/i915/dp: Update pipe_bpp for DP YCbCr4:2:0 outputs Gwan-gyeong Mun
2019-02-08 15:29 ` Maarten Lankhorst
2019-01-31 21:22 ` Patchwork [this message]
2019-02-18 9:44 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Preliminary support " Jani Nikula
2019-02-21 18:47 ` Mun, Gwan-gyeong
2019-01-31 21:25 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-01-31 21:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-02-01 2:53 ` ✓ Fi.CI.IGT: " Patchwork
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