* [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats
@ 2019-03-01 8:16 swati2.sharma
2019-03-01 8:16 ` [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions swati2.sharma
` (13 more replies)
0 siblings, 14 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: narmstrong, maxime.ripard, daniel.vetter, intel-gfx, ayaka,
ayan.halder, linux-media
From: Swati Sharma <swati2.sharma@intel.com>
This patch series is for enabling P0xx, Y2xx and Y4xx pixel formats for
intel's i915 driver.
In this patch series, Juha Pekka's patch series Gen10+ P0xx formats
https://patchwork.freedesktop.org/series/56053/ is combined with Swati's
https://patchwork.freedesktop.org/series/55035/ for Gen11+ pixel formats
(Y2xx and Y4xx).
P0xx pixel formats are enabled from GLK whereas Y2xx and Y4xx are enabled
from ICL platform.
These patches enable planar formats YUV420-P010, P012 and P016
(Intial 3 patches of Juha) for GLK+ platform and packed format YUV422-Y210,
Y212 and Y216 and YUV444-Y410, Y412, Y416 for 10, 12 and 16 bits for ICL+
platforms.
IGT validating all these pixel formats is written by Maarten Lankhorst
https://patchwork.freedesktop.org/patch/284508/
IGT needs libraries for pixman and cairo to support more than 8bpc. Need
cairo >= 1.17.2 and pixman-1 >= 0.36.0.
Tested with custom cairo and pixman. P0xx and Y2xx successfully validated for
HDR planes, SDR planes having CRC mismatch (known bug for all YUV formats).
Juha-Pekka Heikkila (3):
drm/i915: Add P010, P012, P016 plane control definitions
drm/i915: Preparations for enabling P010, P012, P016 formats
drm/i915: Enable P010, P012, P016 formats for primary and sprite
planes
Swati Sharma (3):
drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control
definitions
drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for
universal planes
drivers/gpu/drm/drm_fourcc.c | 6 ++
drivers/gpu/drm/i915/i915_reg.h | 9 +++
drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +-
drivers/gpu/drm/i915/intel_display.c | 57 ++++++++++++++--
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 14 ++--
drivers/gpu/drm/i915/intel_sprite.c | 108 ++++++++++++++++++++++++++++--
include/uapi/drm/drm_fourcc.h | 18 ++++-
8 files changed, 195 insertions(+), 20 deletions(-)
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
@ 2019-03-01 8:16 ` swati2.sharma
2019-03-01 8:16 ` [PATCH 2/6] drm/i915: Preparations for enabling P010, P012, P016 formats swati2.sharma
` (12 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: narmstrong, maxime.ripard, daniel.vetter, intel-gfx, ayaka,
ayan.halder, linux-media
From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Add needed plane control flag definitions for P010, P012 and
P016 formats.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c9b482b..ce4ad20 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6602,8 +6602,11 @@ enum {
#define PLANE_CTL_FORMAT_YUV422 (0 << 24)
#define PLANE_CTL_FORMAT_NV12 (1 << 24)
#define PLANE_CTL_FORMAT_XRGB_2101010 (2 << 24)
+#define PLANE_CTL_FORMAT_P010 (3 << 24)
#define PLANE_CTL_FORMAT_XRGB_8888 (4 << 24)
+#define PLANE_CTL_FORMAT_P012 (5 << 24)
#define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
+#define PLANE_CTL_FORMAT_P016 (7 << 24)
#define PLANE_CTL_FORMAT_AYUV (8 << 24)
#define PLANE_CTL_FORMAT_INDEXED (12 << 24)
#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/6] drm/i915: Preparations for enabling P010, P012, P016 formats
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
2019-03-01 8:16 ` [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions swati2.sharma
@ 2019-03-01 8:16 ` swati2.sharma
2019-03-01 8:16 ` [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes swati2.sharma
` (11 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: stanislav.lisovskiy, narmstrong, maxime.ripard, daniel.vetter,
intel-gfx, ayaka, juhapekka.heikkila, Swati Sharma, ayan.halder,
linux-media
From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Preparations for enabling P010, P012 and P016 formats. These
formats will extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +-
drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++++------
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 14 +++++++-------
drivers/gpu/drm/i915/intel_sprite.c | 22 +++++++++++++++++++---
5 files changed, 49 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 7961cf0..9d32a6f 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -136,7 +136,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
new_crtc_state->active_planes |= BIT(plane->id);
if (new_plane_state->base.visible &&
- new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
+ is_planar_yuv_format(new_plane_state->base.fb->format->format))
new_crtc_state->nv12_planes |= BIT(plane->id);
if (new_plane_state->base.visible &&
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7c5e84e..61ad775 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2681,6 +2681,12 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
return DRM_FORMAT_RGB565;
case PLANE_CTL_FORMAT_NV12:
return DRM_FORMAT_NV12;
+ case PLANE_CTL_FORMAT_P010:
+ return DRM_FORMAT_P010;
+ case PLANE_CTL_FORMAT_P012:
+ return DRM_FORMAT_P012;
+ case PLANE_CTL_FORMAT_P016:
+ return DRM_FORMAT_P016;
default:
case PLANE_CTL_FORMAT_XRGB_8888:
if (rgb_order) {
@@ -3179,7 +3185,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
* Handle the AUX surface first since
* the main surface setup depends on it.
*/
- if (fb->format->format == DRM_FORMAT_NV12) {
+ if (is_planar_yuv_format(fb->format->format)) {
ret = skl_check_nv12_aux_surface(plane_state);
if (ret)
return ret;
@@ -3604,6 +3610,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
case DRM_FORMAT_NV12:
return PLANE_CTL_FORMAT_NV12;
+ case DRM_FORMAT_P010:
+ return PLANE_CTL_FORMAT_P010;
+ case DRM_FORMAT_P012:
+ return PLANE_CTL_FORMAT_P012;
+ case DRM_FORMAT_P016:
+ return PLANE_CTL_FORMAT_P016;
default:
MISSING_CASE(pixel_format);
}
@@ -5027,9 +5039,9 @@ u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_cosited)
return 0;
}
- if (format && format->format == DRM_FORMAT_NV12 &&
+ if (format && is_planar_yuv_format(format->format) &&
(src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {
- DRM_DEBUG_KMS("NV12: src dimensions not met\n");
+ DRM_DEBUG_KMS("Planar YUV: src dimensions not met\n");
return -EINVAL;
}
@@ -5103,7 +5115,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
if (!icl_is_hdr_plane(intel_plane) &&
- fb && fb->format->format == DRM_FORMAT_NV12)
+ fb && is_planar_yuv_format(fb->format->format))
need_scaler = true;
ret = skl_update_scaler(crtc_state, force_detach,
@@ -5140,6 +5152,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_P010:
+ case DRM_FORMAT_P012:
+ case DRM_FORMAT_P016:
break;
default:
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -11191,7 +11206,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
}
if (!linked_state) {
- DRM_DEBUG_KMS("Need %d free Y planes for NV12\n",
+ DRM_DEBUG_KMS("Need %d free Y planes for planar YUV\n",
hweight8(crtc_state->nv12_planes));
return -EINVAL;
@@ -13909,7 +13924,7 @@ static void fb_obj_bump_render_priority(struct drm_i915_gem_object *obj)
* or
* cdclk/crtc_clock
*/
- mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3;
+ mult = is_planar_yuv_format(pixel_format) ? 2 : 3;
tmpclk1 = (1 << 16) * mult - 1;
tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
max_scale = min(tmpclk1, tmpclk2);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5412373..58483f8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2410,6 +2410,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
/* intel_sprite.c */
+bool is_planar_yuv_format(u32 pixelformat);
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
int usecs);
struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4c0e43c..1e093e4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3970,7 +3970,7 @@ static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,
val = I915_READ(PLANE_BUF_CFG(pipe, plane_id));
val2 = I915_READ(PLANE_NV12_BUF_CFG(pipe, plane_id));
- if (fourcc == DRM_FORMAT_NV12)
+ if (is_planar_yuv_format(fourcc))
swap(val, val2);
skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
@@ -4180,7 +4180,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
if (intel_plane->id == PLANE_CURSOR)
return 0;
- if (plane == 1 && format != DRM_FORMAT_NV12)
+ if (plane == 1 && !is_planar_yuv_format(format))
return 0;
/*
@@ -4192,7 +4192,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
height = drm_rect_height(&intel_pstate->base.src) >> 16;
/* UV plane does 1/2 pixel sub-sampling */
- if (plane == 1 && format == DRM_FORMAT_NV12) {
+ if (plane == 1 && is_planar_yuv_format(format)) {
width /= 2;
height /= 2;
}
@@ -4585,9 +4585,9 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
const struct drm_framebuffer *fb = pstate->fb;
u32 interm_pbpl;
- /* only NV12 format has two planes */
- if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
- DRM_DEBUG_KMS("Non NV12 format have single plane\n");
+ /* only planar format has two planes */
+ if (color_plane == 1 && !is_planar_yuv_format(fb->format->format)) {
+ DRM_DEBUG_KMS("Non planar format have single plane\n");
return -EINVAL;
}
@@ -4598,7 +4598,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
- wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
+ wp->is_planar = is_planar_yuv_format(fb->format->format);
if (plane->id == PLANE_CURSOR) {
wp->width = intel_pstate->base.crtc_w;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 6103986..1be7d59 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -41,6 +41,19 @@
#include "i915_drv.h"
#include <drm/drm_color_mgmt.h>
+bool is_planar_yuv_format(u32 pixelformat)
+{
+ switch (pixelformat) {
+ case DRM_FORMAT_NV12:
+ case DRM_FORMAT_P010:
+ case DRM_FORMAT_P012:
+ case DRM_FORMAT_P016:
+ return true;
+ default:
+ return false;
+ }
+}
+
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
int usecs)
{
@@ -335,7 +348,7 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
0, INT_MAX);
/* TODO: handle sub-pixel coordinates */
- if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
+ if (is_planar_yuv_format(plane_state->base.fb->format->format) &&
!icl_is_hdr_plane(plane)) {
y_hphase = skl_scaler_calc_phase(1, hscale, false);
y_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -1564,10 +1577,10 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
int src_w = drm_rect_width(&plane_state->base.src) >> 16;
/* Display WA #1106 */
- if (fb->format->format == DRM_FORMAT_NV12 && src_w & 3 &&
+ if (is_planar_yuv_format(fb->format->format) && src_w & 3 &&
(rotation == DRM_MODE_ROTATE_270 ||
rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
- DRM_DEBUG_KMS("src width must be multiple of 4 for rotated NV12\n");
+ DRM_DEBUG_KMS("src width must be multiple of 4 for rotated planar YUV\n");
return -EINVAL;
}
@@ -1958,6 +1971,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_P010:
+ case DRM_FORMAT_P012:
+ case DRM_FORMAT_P016:
if (modifier == I915_FORMAT_MOD_Yf_TILED)
return true;
/* fall through */
--
1.9.1
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
2019-03-01 8:16 ` [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions swati2.sharma
2019-03-01 8:16 ` [PATCH 2/6] drm/i915: Preparations for enabling P010, P012, P016 formats swati2.sharma
@ 2019-03-01 8:16 ` swati2.sharma
2019-03-01 8:16 ` [PATCH 4/6] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc swati2.sharma
` (10 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: narmstrong, maxime.ripard, daniel.vetter, intel-gfx, ayaka,
ayan.halder, linux-media
From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Enabling of P010, P012 and P016 formats. These formats will
extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 28 ++++++++++++++++++++++++++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 1be7d59..0db3c5d 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1832,6 +1832,25 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
DRM_FORMAT_NV12,
};
+static const uint32_t glk_planar_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
+ DRM_FORMAT_NV12,
+ DRM_FORMAT_P010,
+ DRM_FORMAT_P012,
+ DRM_FORMAT_P016,
+};
+
static const u64 skl_plane_format_modifiers_noccs[] = {
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
@@ -2114,8 +2133,13 @@ struct intel_plane *
plane->update_slave = icl_update_slave;
if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
- formats = skl_planar_formats;
- num_formats = ARRAY_SIZE(skl_planar_formats);
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+ formats = glk_planar_formats;
+ num_formats = ARRAY_SIZE(glk_planar_formats);
+ } else {
+ formats = skl_planar_formats;
+ num_formats = ARRAY_SIZE(skl_planar_formats);
+ }
} else {
formats = skl_plane_formats;
num_formats = ARRAY_SIZE(skl_plane_formats);
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/6] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (2 preceding siblings ...)
2019-03-01 8:16 ` [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes swati2.sharma
@ 2019-03-01 8:16 ` swati2.sharma
2019-03-01 8:16 ` [PATCH 5/6] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions swati2.sharma
` (9 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: stanislav.lisovskiy, Vidya Srinivas, narmstrong, maxime.ripard,
daniel.vetter, intel-gfx, ayaka, juhapekka.heikkila, Swati Sharma,
ayan.halder, linux-media
From: Swati Sharma <swati2.sharma@intel.com>
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies 32bit.
Y210: For each component, valid data occupies MSB 10 bits.
LSB 6 bits are filled with zeroes.
Y212: For each component, valid data occupies MSB 12 bits.
LSB 4 bits are filled with zeroes.
Y216: For each component valid data occupies 16 bits,
doesn't require any padding bits.
First 16 bits stores the Y value and the next 16 bits stores one
of the chroma samples alternatively. The first luma sample will
be accompanied by first U sample and second luma sample is
accompanied by the first V sample.
The following pixel formats are packed format that follows 4:4:4
chroma sampling. Channels are arranged in the order UYVA in
increasing memory order.
Y410: Each color component occupies 10 bits and X component
takes 2 bits, thus each pixel occupies 32 bits.
Y412: Each color component is 16 bits where valid data
occupies MSB 12 bits. LSB 4 bits are filled with zeroes.
Thus, each pixel occupies 64 bits.
Y416: Each color component occupies 16 bits for valid data,
doesn't require any padding bits. Thus, each pixel
occupies 64 bits.
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/drm_fourcc.c | 6 ++++++
include/uapi/drm/drm_fourcc.h | 18 +++++++++++++++++-
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index ba7e19d..45c9882 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -226,6 +226,12 @@ const struct drm_format_info *__drm_format_info(u32 format)
{ .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
+ { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
.char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
.hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index bab2029..6e20ced 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -151,7 +151,23 @@
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
-#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
+
+/*
+ * packed Y2xx indicate for each component, xx valid data occupy msb
+ * 16-xx padding occupy lsb
+ */
+#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
+#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
+#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
+
+/*
+ * packed Y4xx indicate for each component, xx valid data occupy msb
+ * 16-xx padding occupy lsb except Y410
+ */
+#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
+#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
+#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
/*
* packed YCbCr420 2x2 tiled formats
--
1.9.1
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/6] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (3 preceding siblings ...)
2019-03-01 8:16 ` [PATCH 4/6] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc swati2.sharma
@ 2019-03-01 8:16 ` swati2.sharma
2019-03-01 8:16 ` [PATCH 6/6] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes swati2.sharma
` (8 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: narmstrong, maxime.ripard, daniel.vetter, intel-gfx, ayaka,
ayan.halder, linux-media
From: Swati Sharma <swati2.sharma@intel.com>
Added needed plane control flag definitions for Y2xx and Y4xx (10, 12 and
16 bits)
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ce4ad20..54bba61 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6612,6 +6612,12 @@ enum {
#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
#define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
#define PLANE_CTL_PIPE_CSC_ENABLE (1 << 23) /* Pre-GLK */
+#define PLANE_CTL_FORMAT_Y210 (1 << 23)
+#define PLANE_CTL_FORMAT_Y212 (3 << 23)
+#define PLANE_CTL_FORMAT_Y216 (5 << 23)
+#define PLANE_CTL_FORMAT_Y410 (7 << 23)
+#define PLANE_CTL_FORMAT_Y412 (9 << 23)
+#define PLANE_CTL_FORMAT_Y416 (0xb << 23)
#define PLANE_CTL_KEY_ENABLE_MASK (0x3 << 21)
#define PLANE_CTL_KEY_ENABLE_SOURCE (1 << 21)
#define PLANE_CTL_KEY_ENABLE_DESTINATION (2 << 21)
--
1.9.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/6] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (4 preceding siblings ...)
2019-03-01 8:16 ` [PATCH 5/6] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions swati2.sharma
@ 2019-03-01 8:16 ` swati2.sharma
2019-03-01 8:26 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3) Patchwork
` (7 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: swati2.sharma @ 2019-03-01 8:16 UTC (permalink / raw)
To: dri-devel
Cc: narmstrong, maxime.ripard, daniel.vetter, intel-gfx, ayaka,
ayan.halder, linux-media
From: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 30 ++++++++++++++++++
drivers/gpu/drm/i915/intel_sprite.c | 60 +++++++++++++++++++++++++++++++++++-
2 files changed, 89 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 61ad775..6825267 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2687,6 +2687,18 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
return DRM_FORMAT_P012;
case PLANE_CTL_FORMAT_P016:
return DRM_FORMAT_P016;
+ case PLANE_CTL_FORMAT_Y210:
+ return DRM_FORMAT_Y210;
+ case PLANE_CTL_FORMAT_Y212:
+ return DRM_FORMAT_Y212;
+ case PLANE_CTL_FORMAT_Y216:
+ return DRM_FORMAT_Y216;
+ case PLANE_CTL_FORMAT_Y410:
+ return DRM_FORMAT_Y410;
+ case PLANE_CTL_FORMAT_Y412:
+ return DRM_FORMAT_Y412;
+ case PLANE_CTL_FORMAT_Y416:
+ return DRM_FORMAT_Y416;
default:
case PLANE_CTL_FORMAT_XRGB_8888:
if (rgb_order) {
@@ -3616,6 +3628,18 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
return PLANE_CTL_FORMAT_P012;
case DRM_FORMAT_P016:
return PLANE_CTL_FORMAT_P016;
+ case DRM_FORMAT_Y210:
+ return PLANE_CTL_FORMAT_Y210;
+ case DRM_FORMAT_Y212:
+ return PLANE_CTL_FORMAT_Y212;
+ case DRM_FORMAT_Y216:
+ return PLANE_CTL_FORMAT_Y216;
+ case DRM_FORMAT_Y410:
+ return PLANE_CTL_FORMAT_Y410;
+ case DRM_FORMAT_Y412:
+ return PLANE_CTL_FORMAT_Y412;
+ case DRM_FORMAT_Y416:
+ return PLANE_CTL_FORMAT_Y416;
default:
MISSING_CASE(pixel_format);
}
@@ -5155,6 +5179,12 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
+ case DRM_FORMAT_Y210:
+ case DRM_FORMAT_Y212:
+ case DRM_FORMAT_Y216:
+ case DRM_FORMAT_Y410:
+ case DRM_FORMAT_Y412:
+ case DRM_FORMAT_Y416:
break;
default:
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 0db3c5d..89d7bf7 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1816,6 +1816,27 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
DRM_FORMAT_VYUY,
};
+static const uint32_t icl_plane_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
+ DRM_FORMAT_Y210,
+ DRM_FORMAT_Y212,
+ DRM_FORMAT_Y216,
+ DRM_FORMAT_Y410,
+ DRM_FORMAT_Y412,
+ DRM_FORMAT_Y416,
+};
+
static const u32 skl_planar_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
@@ -1851,6 +1872,31 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
DRM_FORMAT_P016,
};
+static const uint32_t icl_planar_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
+ DRM_FORMAT_NV12,
+ DRM_FORMAT_P010,
+ DRM_FORMAT_P012,
+ DRM_FORMAT_P016,
+ DRM_FORMAT_Y210,
+ DRM_FORMAT_Y212,
+ DRM_FORMAT_Y216,
+ DRM_FORMAT_Y410,
+ DRM_FORMAT_Y412,
+ DRM_FORMAT_Y416,
+};
+
static const u64 skl_plane_format_modifiers_noccs[] = {
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
@@ -1993,6 +2039,12 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
+ case DRM_FORMAT_Y210:
+ case DRM_FORMAT_Y212:
+ case DRM_FORMAT_Y216:
+ case DRM_FORMAT_Y410:
+ case DRM_FORMAT_Y412:
+ case DRM_FORMAT_Y416:
if (modifier == I915_FORMAT_MOD_Yf_TILED)
return true;
/* fall through */
@@ -2133,13 +2185,19 @@ struct intel_plane *
plane->update_slave = icl_update_slave;
if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
- if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+ if (INTEL_GEN(dev_priv) >= 11) {
+ formats = icl_planar_formats;
+ num_formats = ARRAY_SIZE(icl_planar_formats);
+ } else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
formats = glk_planar_formats;
num_formats = ARRAY_SIZE(glk_planar_formats);
} else {
formats = skl_planar_formats;
num_formats = ARRAY_SIZE(skl_planar_formats);
}
+ } else if (INTEL_GEN(dev_priv) >= 11) {
+ formats = icl_plane_formats;
+ num_formats = ARRAY_SIZE(icl_plane_formats);
} else {
formats = skl_plane_formats;
num_formats = ARRAY_SIZE(skl_plane_formats);
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (5 preceding siblings ...)
2019-03-01 8:16 ` [PATCH 6/6] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes swati2.sharma
@ 2019-03-01 8:26 ` Patchwork
2019-03-01 8:30 ` ✗ Fi.CI.SPARSE: " Patchwork
` (6 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-01 8:26 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
URL : https://patchwork.freedesktop.org/series/56606/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5ce21c7dd534 drm/i915: Add P010, P012, P016 plane control definitions
9096b3421086 drm/i915: Preparations for enabling P010, P012, P016 formats
e5606e0fb29e drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
-:22: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#22: FILE: drivers/gpu/drm/i915/intel_sprite.c:1835:
+static const uint32_t glk_planar_formats[] = {
total: 0 errors, 0 warnings, 1 checks, 40 lines checked
291c4cd3bc3a drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
-:48: WARNING:LONG_LINE: line over 100 characters
#48: FILE: drivers/gpu/drm/drm_fourcc.c:229:
+ { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
-:49: WARNING:LONG_LINE: line over 100 characters
#49: FILE: drivers/gpu/drm/drm_fourcc.c:230:
+ { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
-:50: WARNING:LONG_LINE: line over 100 characters
#50: FILE: drivers/gpu/drm/drm_fourcc.c:231:
+ { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
-:51: WARNING:LONG_LINE: line over 100 characters
#51: FILE: drivers/gpu/drm/drm_fourcc.c:232:
+ { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:52: WARNING:LONG_LINE: line over 100 characters
#52: FILE: drivers/gpu/drm/drm_fourcc.c:233:
+ { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:53: WARNING:LONG_LINE: line over 100 characters
#53: FILE: drivers/gpu/drm/drm_fourcc.c:234:
+ { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:66: WARNING:LONG_LINE_COMMENT: line over 100 characters
#66: FILE: include/uapi/drm/drm_fourcc.h:154:
+#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
-:72: WARNING:LONG_LINE_COMMENT: line over 100 characters
#72: FILE: include/uapi/drm/drm_fourcc.h:160:
+#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
-:73: WARNING:LONG_LINE_COMMENT: line over 100 characters
#73: FILE: include/uapi/drm/drm_fourcc.h:161:
+#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
-:74: WARNING:LONG_LINE_COMMENT: line over 100 characters
#74: FILE: include/uapi/drm/drm_fourcc.h:162:
+#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
-:80: WARNING:LONG_LINE_COMMENT: line over 100 characters
#80: FILE: include/uapi/drm/drm_fourcc.h:168:
+#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
-:81: WARNING:LONG_LINE_COMMENT: line over 100 characters
#81: FILE: include/uapi/drm/drm_fourcc.h:169:
+#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
-:82: WARNING:LONG_LINE_COMMENT: line over 100 characters
#82: FILE: include/uapi/drm/drm_fourcc.h:170:
+#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
total: 0 errors, 13 warnings, 0 checks, 36 lines checked
07e294567498 drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
4d716705c852 drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:75: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#75: FILE: drivers/gpu/drm/i915/intel_sprite.c:1819:
+static const uint32_t icl_plane_formats[] = {
-:103: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#103: FILE: drivers/gpu/drm/i915/intel_sprite.c:1875:
+static const uint32_t icl_planar_formats[] = {
total: 0 errors, 1 warnings, 2 checks, 138 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (6 preceding siblings ...)
2019-03-01 8:26 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3) Patchwork
@ 2019-03-01 8:30 ` Patchwork
2019-03-01 8:55 ` ✓ Fi.CI.BAT: success " Patchwork
` (5 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-01 8:30 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
URL : https://patchwork.freedesktop.org/series/56606/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Add P010, P012, P016 plane control definitions
Okay!
Commit: drm/i915: Preparations for enabling P010, P012, P016 formats
-O:drivers/gpu/drm/i915/intel_display.c:13915:21: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_display.c:13915:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_display.c:13930:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_display.c:13930:21: warning: expression using sizeof(void)
Commit: drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
Okay!
Commit: drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
Okay!
Commit: drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
Okay!
Commit: drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Fi.CI.BAT: success for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (7 preceding siblings ...)
2019-03-01 8:30 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-01 8:55 ` Patchwork
2019-03-01 11:01 ` ✗ Fi.CI.IGT: failure " Patchwork
` (4 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-01 8:55 UTC (permalink / raw)
To: Sharma, Swati2; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
URL : https://patchwork.freedesktop.org/series/56606/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5675 -> Patchwork_12336
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/56606/revisions/3/mbox/
Known issues
------------
Here are the changes found in Patchwork_12336 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: PASS -> FAIL [fdo#108511]
* igt@kms_busy@basic-flip-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +48
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: SKIP [fdo#109271] -> PASS
* igt@i915_pm_rpm@basic-rte:
- fi-bsw-kefka: FAIL [fdo#108800] -> PASS
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#109720] -> PASS
* igt@kms_busy@basic-flip-b:
- fi-gdg-551: FAIL [fdo#103182] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
Participating hosts (42 -> 38)
------------------------------
Missing (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_5675 -> Patchwork_12336
CI_DRM_5675: 204c772a8bb7898bcc4e80f329f5334ff88aeba8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4864: 6be2dc8ddfa332d129149aa3b13db14fa2cd6c0a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12336: 4d716705c8527ae1480377658820b0bbf4d0bdf4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4d716705c852 drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
07e294567498 drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
291c4cd3bc3a drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
e5606e0fb29e drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
9096b3421086 drm/i915: Preparations for enabling P010, P012, P016 formats
5ce21c7dd534 drm/i915: Add P010, P012, P016 plane control definitions
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12336/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Fi.CI.IGT: failure for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (8 preceding siblings ...)
2019-03-01 8:55 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-01 11:01 ` Patchwork
2019-03-04 8:20 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4) Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-01 11:01 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3)
URL : https://patchwork.freedesktop.org/series/56606/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5675_full -> Patchwork_12336_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12336_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12336_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12336_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_available_modes_crc@available_mode_test_crc:
- shard-iclb: NOTRUN -> FAIL
Known issues
------------
Here are the changes found in Patchwork_12336_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@extended-semaphore-blt:
- shard-iclb: NOTRUN -> SKIP [fdo#109275] +3
* igt@gem_busy@extended-semaphore-bsd1:
- shard-iclb: NOTRUN -> SKIP [fdo#109275] / [fdo#109276] +1
* igt@gem_ctx_isolation@bcs0-s3:
- shard-iclb: NOTRUN -> SKIP [fdo#109281] +21
* igt@gem_ctx_isolation@vcs1-reset:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] / [fdo#109281] +5
* igt@gem_ctx_isolation@vcs1-s3:
- shard-kbl: PASS -> INCOMPLETE [fdo#103665]
* igt@gem_ctx_param@invalid-param-set:
- shard-iclb: NOTRUN -> FAIL [fdo#109674]
* igt@gem_ctx_param@set-priority-not-supported:
- shard-iclb: NOTRUN -> SKIP [fdo#109314]
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-iclb: NOTRUN -> SKIP [fdo#109313]
* igt@gem_exec_params@no-vebox:
- shard-iclb: NOTRUN -> SKIP [fdo#109283] +3
* igt@gem_exec_parse@basic-rejected:
- shard-iclb: NOTRUN -> SKIP [fdo#109289] +20
* igt@gem_exec_parse@oacontrol-tracking:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +93
* igt@gem_exec_schedule@preempt-other-bsd1:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] +125
* igt@gem_mmap_gtt@coherency:
- shard-iclb: NOTRUN -> SKIP [fdo#109292] +1
* igt@gem_mocs_settings@mocs-reset-ctx-render:
- shard-iclb: NOTRUN -> SKIP [fdo#109287] +16
* igt@gem_mocs_settings@mocs-settings-bsd1:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] / [fdo#109287] +5
* igt@gem_pwrite@huge-gtt-backwards:
- shard-iclb: NOTRUN -> SKIP [fdo#109290] +10
* igt@gem_softpin@evict-snoop:
- shard-iclb: NOTRUN -> SKIP [fdo#109312] +1
* igt@gem_stolen@stolen-clear:
- shard-iclb: NOTRUN -> SKIP [fdo#109277] +16
* igt@gem_tiled_blits@interruptible:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@i915_pm_lpsp@non-edp:
- shard-iclb: NOTRUN -> SKIP [fdo#109301] +3
* igt@i915_pm_rpm@basic-rte:
- shard-iclb: NOTRUN -> DMESG-WARN [fdo#108654]
* igt@i915_pm_rpm@cursor-dpms:
- shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +2
* igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-iclb: NOTRUN -> SKIP [fdo#109308] +4
* igt@i915_pm_rpm@fences-dpms:
- shard-skl: PASS -> INCOMPLETE [fdo#107807]
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-iclb: NOTRUN -> SKIP [fdo#109506]
* igt@i915_pm_rpm@legacy-planes:
- shard-iclb: NOTRUN -> INCOMPLETE [fdo#108840] / [fdo#109369]
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-iclb: NOTRUN -> SKIP [fdo#109293] +1
* igt@i915_pm_rps@min-max-config-loaded:
- shard-iclb: NOTRUN -> FAIL [fdo#102250]
* igt@i915_pm_rps@reset:
- shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] +1
* igt@i915_pm_sseu@full-enable:
- shard-iclb: NOTRUN -> SKIP [fdo#109288]
* igt@i915_query@query-topology-known-pci-ids:
- shard-iclb: NOTRUN -> SKIP [fdo#109303]
* igt@i915_query@query-topology-unsupported:
- shard-iclb: NOTRUN -> SKIP [fdo#109302]
* igt@i915_selftest@live_contexts:
- shard-iclb: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-snb: PASS -> INCOMPLETE [fdo#105411]
* igt@kms_atomic_transition@3x-modeset-transitions-nonblocking:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] +6
* igt@kms_busy@extended-modeset-hang-newfb-render-d:
- shard-iclb: NOTRUN -> SKIP [fdo#109278] +51
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1
* igt@kms_busy@extended-modeset-hang-oldfb-render-e:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6
* igt@kms_ccs@pipe-a-crc-primary-rotation-180:
- shard-iclb: NOTRUN -> FAIL [fdo#107725] +8
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-apl: PASS -> FAIL [fdo#106510] / [fdo#108145]
* igt@kms_chamelium@dp-frame-dump:
- shard-iclb: NOTRUN -> SKIP [fdo#109284] +43
* igt@kms_chv_cursor_fail@pipe-c-64x64-right-edge:
- shard-skl: NOTRUN -> FAIL [fdo#104671]
* igt@kms_color@pipe-b-gamma:
- shard-iclb: NOTRUN -> FAIL [fdo#104782] +8
* igt@kms_color@pipe-c-ctm-max:
- shard-iclb: NOTRUN -> FAIL [fdo#108147] +2
* igt@kms_content_protection@atomic-dpms:
- shard-iclb: NOTRUN -> SKIP [fdo#109527]
* igt@kms_content_protection@legacy:
- shard-iclb: NOTRUN -> SKIP [fdo#109300] / [fdo#109527] +1
* igt@kms_crtc_background_color:
- shard-iclb: NOTRUN -> SKIP [fdo#109305]
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-iclb: NOTRUN -> FAIL [fdo#103232] +22
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +3
* igt@kms_cursor_crc@cursor-512x512-sliding:
- shard-iclb: NOTRUN -> SKIP [fdo#109279] +8
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: NOTRUN -> SKIP [fdo#109349] +1
* igt@kms_draw_crc@draw-method-xrgb8888-render-untiled:
- shard-skl: PASS -> FAIL [fdo#103184] / [fdo#108472]
* igt@kms_fbcon_fbt@psr-suspend:
- shard-iclb: NOTRUN -> FAIL [fdo#103833] +1
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-iclb: NOTRUN -> SKIP [fdo#109274] +70
* igt@kms_flip@dpms-vs-vblank-race-interruptible:
- shard-kbl: PASS -> FAIL [fdo#103060]
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_force_connector_basic@force-edid:
- shard-iclb: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-iclb: NOTRUN -> FAIL [fdo#103167] +4
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
- shard-apl: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt:
- shard-glk: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +32
* igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack:
- shard-iclb: NOTRUN -> SKIP [fdo#109280] +208
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render:
- shard-skl: PASS -> FAIL [fdo#103167]
* igt@kms_hdmi_inject@inject-audio:
- shard-iclb: NOTRUN -> FAIL [fdo#102370]
* igt@kms_invalid_dotclock:
- shard-iclb: NOTRUN -> SKIP [fdo#109310]
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-iclb: NOTRUN -> FAIL [fdo#103166] +6
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#106885]
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-iclb: NOTRUN -> FAIL [fdo#108948] +2
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-glk: PASS -> SKIP [fdo#109271] +5
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +5
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166] +3
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-iclb: NOTRUN -> SKIP [fdo#109274] / [fdo#109278]
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- shard-glk: PASS -> SKIP [fdo#109271] / [fdo#109278] +7
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-iclb: NOTRUN -> FAIL [fdo#109052] +5
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: NOTRUN -> SKIP [fdo#109642] +1
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: NOTRUN -> SKIP [fdo#109441] +20
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: PASS -> FAIL [fdo#109016]
* igt@kms_setmode@basic:
- shard-iclb: NOTRUN -> FAIL [fdo#99912]
* igt@kms_sysfs_edid_timing:
- shard-iclb: NOTRUN -> FAIL [fdo#100047]
* igt@kms_tv_load_detect@load-detect:
- shard-iclb: NOTRUN -> SKIP [fdo#109309]
* igt@kms_universal_plane@universal-plane-pipe-c-functional:
- shard-apl: NOTRUN -> FAIL [fdo#103166]
* igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm:
- shard-apl: PASS -> FAIL [fdo#104894]
* igt@kms_vrr@flip-basic:
- shard-iclb: NOTRUN -> SKIP [fdo#109502] +2
* igt@prime_nv_pcopy@test2:
- shard-iclb: NOTRUN -> SKIP [fdo#109291] +27
* igt@prime_nv_pcopy@test3_5:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +19
* igt@prime_vgem@basic-fence-flip:
- shard-iclb: NOTRUN -> SKIP [fdo#109294]
* igt@prime_vgem@fence-write-hang:
- shard-iclb: NOTRUN -> SKIP [fdo#109295] +2
* igt@runner@aborted:
- shard-iclb: NOTRUN -> FAIL [fdo#108654]
* igt@tools_test@sysfs_l3_parity:
- shard-iclb: NOTRUN -> SKIP [fdo#109307]
* igt@tools_test@tools_test:
- shard-kbl: PASS -> SKIP [fdo#109271] +1
* igt@v3d_get_param@get-bad-flags:
- shard-iclb: NOTRUN -> SKIP [fdo#109315] +4
#### Possible fixes ####
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-snb: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_color@pipe-c-legacy-gamma:
- shard-apl: FAIL [fdo#104782] -> PASS
- shard-glk: FAIL [fdo#104782] -> PASS
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_cursor_crc@cursor-size-change:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
- shard-skl: FAIL [fdo#103184] -> PASS
* igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled:
- shard-skl: FAIL [fdo#107589] -> PASS
* igt@kms_flip@flip-vs-fences:
- shard-apl: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-glk: FAIL [fdo#103167] -> PASS +3
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: FAIL [fdo#103166] -> PASS +5
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-glk: FAIL [fdo#103166] -> PASS +3
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: DMESG-FAIL [fdo#105763] -> PASS
* igt@kms_setmode@basic:
- shard-apl: FAIL [fdo#99912] -> PASS
* igt@kms_vblank@pipe-b-ts-continuation-modeset:
- shard-apl: FAIL [fdo#104894] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#102250]: https://bugs.freedesktop.org/show_bug.cgi?id=102250
[fdo#102370]: https://bugs.freedesktop.org/show_bug.cgi?id=102370
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104671]: https://bugs.freedesktop.org/show_bug.cgi?id=104671
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#107589]: https://bugs.freedesktop.org/show_bug.cgi?id=107589
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108059]: https://bugs.freedesktop.org/show_bug.cgi?id=108059
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108472]: https://bugs.freedesktop.org/show_bug.cgi?id=108472
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109275]: https://bugs.freedesktop.org/show_bug.cgi?id=109275
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109281]: https://bugs.freedesktop.org/show_bug.cgi?id=109281
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109287]: https://bugs.freedesktop.org/show_bug.cgi?id=109287
[fdo#109288]: https://bugs.freedesktop.org/show_bug.cgi?id=109288
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109292]: https://bugs.freedesktop.org/show_bug.cgi?id=109292
[fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
[fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109305]: https://bugs.freedesktop.org/show_bug.cgi?id=109305
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109310]: https://bugs.freedesktop.org/show_bug.cgi?id=109310
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109369]: https://bugs.freedesktop.org/show_bug.cgi?id=109369
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109527]: https://bugs.freedesktop.org/show_bug.cgi?id=109527
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#109674]: https://bugs.freedesktop.org/show_bug.cgi?id=109674
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (6 -> 7)
------------------------------
Additional (1): shard-iclb
Build changes
-------------
* Linux: CI_DRM_5675 -> Patchwork_12336
CI_DRM_5675: 204c772a8bb7898bcc4e80f329f5334ff88aeba8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4864: 6be2dc8ddfa332d129149aa3b13db14fa2cd6c0a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12336: 4d716705c8527ae1480377658820b0bbf4d0bdf4 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12336/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (9 preceding siblings ...)
2019-03-01 11:01 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-03-04 8:20 ` Patchwork
2019-03-04 8:24 ` ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-04 8:20 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
URL : https://patchwork.freedesktop.org/series/56606/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
08011e2e164e drm/i915: Add P010, P012, P016 plane control definitions
f9b305df8580 drm/i915: Preparations for enabling P010, P012, P016 formats
b3cde057e621 drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
-:22: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#22: FILE: drivers/gpu/drm/i915/intel_sprite.c:1835:
+static const uint32_t glk_planar_formats[] = {
total: 0 errors, 0 warnings, 1 checks, 40 lines checked
89567e7b31f0 drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
-:48: WARNING:LONG_LINE: line over 100 characters
#48: FILE: drivers/gpu/drm/drm_fourcc.c:229:
+ { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
-:49: WARNING:LONG_LINE: line over 100 characters
#49: FILE: drivers/gpu/drm/drm_fourcc.c:230:
+ { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
-:50: WARNING:LONG_LINE: line over 100 characters
#50: FILE: drivers/gpu/drm/drm_fourcc.c:231:
+ { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
-:51: WARNING:LONG_LINE: line over 100 characters
#51: FILE: drivers/gpu/drm/drm_fourcc.c:232:
+ { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:52: WARNING:LONG_LINE: line over 100 characters
#52: FILE: drivers/gpu/drm/drm_fourcc.c:233:
+ { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:53: WARNING:LONG_LINE: line over 100 characters
#53: FILE: drivers/gpu/drm/drm_fourcc.c:234:
+ { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:66: WARNING:LONG_LINE_COMMENT: line over 100 characters
#66: FILE: include/uapi/drm/drm_fourcc.h:154:
+#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
-:72: WARNING:LONG_LINE_COMMENT: line over 100 characters
#72: FILE: include/uapi/drm/drm_fourcc.h:160:
+#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
-:73: WARNING:LONG_LINE_COMMENT: line over 100 characters
#73: FILE: include/uapi/drm/drm_fourcc.h:161:
+#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
-:74: WARNING:LONG_LINE_COMMENT: line over 100 characters
#74: FILE: include/uapi/drm/drm_fourcc.h:162:
+#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
-:80: WARNING:LONG_LINE_COMMENT: line over 100 characters
#80: FILE: include/uapi/drm/drm_fourcc.h:168:
+#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
-:81: WARNING:LONG_LINE_COMMENT: line over 100 characters
#81: FILE: include/uapi/drm/drm_fourcc.h:169:
+#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
-:82: WARNING:LONG_LINE_COMMENT: line over 100 characters
#82: FILE: include/uapi/drm/drm_fourcc.h:170:
+#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
total: 0 errors, 13 warnings, 0 checks, 36 lines checked
d7e8efaf83b4 drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
5c93c9eca237 drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:75: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#75: FILE: drivers/gpu/drm/i915/intel_sprite.c:1819:
+static const uint32_t icl_plane_formats[] = {
-:103: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#103: FILE: drivers/gpu/drm/i915/intel_sprite.c:1875:
+static const uint32_t icl_planar_formats[] = {
total: 0 errors, 1 warnings, 2 checks, 138 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (10 preceding siblings ...)
2019-03-04 8:20 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4) Patchwork
@ 2019-03-04 8:24 ` Patchwork
2019-03-04 8:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-04 11:48 ` ✓ Fi.CI.IGT: " Patchwork
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-04 8:24 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
URL : https://patchwork.freedesktop.org/series/56606/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Add P010, P012, P016 plane control definitions
Okay!
Commit: drm/i915: Preparations for enabling P010, P012, P016 formats
-O:drivers/gpu/drm/i915/intel_display.c:13915:21: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_display.c:13915:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_display.c:13930:21: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_display.c:13930:21: warning: expression using sizeof(void)
Commit: drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
Okay!
Commit: drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
Okay!
Commit: drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
Okay!
Commit: drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Fi.CI.BAT: success for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (11 preceding siblings ...)
2019-03-04 8:24 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-04 8:42 ` Patchwork
2019-03-04 11:48 ` ✓ Fi.CI.IGT: " Patchwork
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-04 8:42 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
URL : https://patchwork.freedesktop.org/series/56606/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5693 -> Patchwork_12355
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/56606/revisions/4/mbox/
Known issues
------------
Here are the changes found in Patchwork_12355 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_busy@basic-flip-a:
- fi-kbl-7567u: PASS -> SKIP [fdo#109271] / [fdo#109278] +2
* igt@kms_busy@basic-flip-b:
- fi-gdg-551: PASS -> FAIL [fdo#103182]
* igt@kms_psr@primary_mmap_gtt:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +27
#### Possible fixes ####
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: FAIL [fdo#103182] -> PASS
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: WARN [fdo#109380] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: SKIP [fdo#109271] -> PASS +33
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
Participating hosts (42 -> 34)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-bsw-kefka fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5693 -> Patchwork_12355
CI_DRM_5693: 87cb56b5fae5e4a1cb77539a9834348605630773 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4869: a958d3f60b7718151fd0bafcdd1e4874262f51b8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12355: 5c93c9eca237a3425b5d8e57e116a59257297294 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5c93c9eca237 drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes
d7e8efaf83b4 drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions
89567e7b31f0 drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
b3cde057e621 drm/i915: Enable P010, P012, P016 formats for primary and sprite planes
f9b305df8580 drm/i915: Preparations for enabling P010, P012, P016 formats
08011e2e164e drm/i915: Add P010, P012, P016 plane control definitions
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12355/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Fi.CI.IGT: success for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
` (12 preceding siblings ...)
2019-03-04 8:42 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-04 11:48 ` Patchwork
13 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2019-03-04 11:48 UTC (permalink / raw)
To: swati2.sharma; +Cc: intel-gfx
== Series Details ==
Series: Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4)
URL : https://patchwork.freedesktop.org/series/56606/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5693_full -> Patchwork_12355_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12355_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_pwrite@huge-gtt-backwards:
- shard-iclb: NOTRUN -> SKIP [fdo#109290] +1
* igt@i915_pm_rpm@dpms-lpsp:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] +6
* igt@i915_pm_rpm@gem-evict-pwrite:
- shard-skl: PASS -> INCOMPLETE [fdo#107807]
* igt@i915_pm_rpm@gem-execbuf-stress-extra-wait:
- shard-skl: PASS -> INCOMPLETE [fdo#107803] / [fdo#107807]
* igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-iclb: PASS -> INCOMPLETE [fdo#107713] / [fdo#108840]
* igt@kms_atomic_transition@3x-modeset-transitions:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +10
* igt@kms_atomic_transition@5x-modeset-transitions:
- shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_chamelium@dp-edid-read:
- shard-iclb: NOTRUN -> SKIP [fdo#109284]
* igt@kms_color@pipe-a-degamma:
- shard-skl: PASS -> FAIL [fdo#104782] / [fdo#108145]
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: PASS -> FAIL [fdo#108147]
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-128x42-random:
- shard-skl: NOTRUN -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-alpha-opaque:
- shard-apl: PASS -> FAIL [fdo#109350]
* igt@kms_draw_crc@draw-method-xrgb8888-render-untiled:
- shard-skl: PASS -> FAIL [fdo#103184] / [fdo#108472]
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-iclb: NOTRUN -> SKIP [fdo#109274]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: NOTRUN -> FAIL [fdo#105363]
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_flip@modeset-vs-vblank-race:
- shard-skl: PASS -> FAIL [fdo#103060]
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-skl: NOTRUN -> FAIL [fdo#103167] / [fdo#105682]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-iclb: NOTRUN -> SKIP [fdo#109280]
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +6
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-iclb: PASS -> FAIL [fdo#103167] +1
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
- shard-skl: NOTRUN -> FAIL [fdo#103191] / [fdo#107362]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-kbl: PASS -> INCOMPLETE [fdo#103665]
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-glk: PASS -> SKIP [fdo#109271] +4
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-apl: PASS -> FAIL [fdo#103166] +3
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
- shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +1
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-apl: PASS -> FAIL [fdo#108145]
- shard-kbl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: NOTRUN -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-iclb: PASS -> FAIL [fdo#103166] +3
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- shard-glk: PASS -> SKIP [fdo#109271] / [fdo#109278] +7
* igt@kms_rotation_crc@multiplane-rotation:
- shard-kbl: NOTRUN -> INCOMPLETE [fdo#103665]
* igt@kms_setmode@basic:
- shard-iclb: NOTRUN -> FAIL [fdo#99912]
* igt@kms_sysfs_edid_timing:
- shard-iclb: PASS -> FAIL [fdo#100047]
* igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm:
- shard-apl: PASS -> FAIL [fdo#104894]
* igt@kms_vrr@flip-suspend:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +102
* igt@prime_nv_pcopy@test3_4:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +8
#### Possible fixes ####
* igt@debugfs_test@read_all_entries_display_off:
- shard-skl: INCOMPLETE [fdo#104108] -> PASS +1
* igt@i915_pm_rpm@debugfs-read:
- shard-skl: INCOMPLETE [fdo#107807] -> PASS
* igt@i915_pm_rpm@i2c:
- shard-iclb: DMESG-WARN [fdo#107724] -> PASS
* igt@kms_atomic_transition@1x-modeset-transitions-fencing:
- shard-skl: FAIL [fdo#107815] / [fdo#108470] -> PASS
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-iclb: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_ccs@pipe-a-crc-primary-basic:
- shard-skl: FAIL [fdo#107725] -> PASS
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-apl: FAIL [fdo#106510] / [fdo#108145] -> PASS
* igt@kms_cursor_crc@cursor-64x64-sliding:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-alpha-transparent:
- shard-skl: FAIL [fdo#109350] -> PASS
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
- shard-skl: FAIL [fdo#103184] / [fdo#103232] -> PASS
* igt@kms_flip@modeset-vs-vblank-race-interruptible:
- shard-apl: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_flip_tiling@flip-y-tiled:
- shard-skl: FAIL [fdo#108303] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt:
- shard-skl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-glk: FAIL [fdo#103167] -> PASS +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
- shard-skl: FAIL [fdo#105682] -> PASS
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- shard-iclb: FAIL [fdo#103167] -> PASS
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: FAIL [fdo#107815] -> PASS
* igt@kms_plane_multiple@atomic-pipe-a-tiling-none:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-apl: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-iclb: FAIL [fdo#103166] -> PASS +1
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: FAIL [fdo#109016] -> PASS
#### Warnings ####
* igt@kms_plane@pixel-format-pipe-c-planes:
- shard-glk: FAIL [fdo#103166] -> SKIP [fdo#109271]
* igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
- shard-iclb: DMESG-WARN [fdo#107724] -> FAIL [fdo#109052] +4
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
[fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303
[fdo#108470]: https://bugs.freedesktop.org/show_bug.cgi?id=108470
[fdo#108472]: https://bugs.freedesktop.org/show_bug.cgi?id=108472
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_5693 -> Patchwork_12355
CI_DRM_5693: 87cb56b5fae5e4a1cb77539a9834348605630773 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4869: a958d3f60b7718151fd0bafcdd1e4874262f51b8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12355: 5c93c9eca237a3425b5d8e57e116a59257297294 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12355/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2019-03-04 11:48 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-03-01 8:16 [PATCH 0/6] Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats swati2.sharma
2019-03-01 8:16 ` [PATCH 1/6] drm/i915: Add P010, P012, P016 plane control definitions swati2.sharma
2019-03-01 8:16 ` [PATCH 2/6] drm/i915: Preparations for enabling P010, P012, P016 formats swati2.sharma
2019-03-01 8:16 ` [PATCH 3/6] drm/i915: Enable P010, P012, P016 formats for primary and sprite planes swati2.sharma
2019-03-01 8:16 ` [PATCH 4/6] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc swati2.sharma
2019-03-01 8:16 ` [PATCH 5/6] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions swati2.sharma
2019-03-01 8:16 ` [PATCH 6/6] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes swati2.sharma
2019-03-01 8:26 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev3) Patchwork
2019-03-01 8:30 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-01 8:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-01 11:01 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-04 8:20 ` ✗ Fi.CI.CHECKPATCH: warning for Enable P0xx (planar), Y2xx/Y4xx (packed) pixel formats (rev4) Patchwork
2019-03-04 8:24 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-04 8:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-04 11:48 ` ✓ Fi.CI.IGT: " Patchwork
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