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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH v3 3/3] drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR
Date: Mon, 11 Mar 2019 16:44:49 -0700	[thread overview]
Message-ID: <20190311234449.GG24277@intel.com> (raw)
In-Reply-To: <a0bdc66a52518a10e8a46488fb76c22a03556a4a.camel@intel.com>

On Mon, Mar 11, 2019 at 04:38:00PM -0700, Souza, Jose wrote:
> On Mon, 2019-03-11 at 16:34 -0700, Rodrigo Vivi wrote:
> > On Tue, Mar 05, 2019 at 03:47:34PM -0800, José Roberto de Souza
> > wrote:
> > > TPS4 support was added to PSR because HBR3/PSR spec was not closed
> > > when ICL was freezed so if HBR3 was supported by PSR, ICL would
> > > already be ready but it was not added to spec so lets always
> > > disable TPS4.
> > > 
> > > v3: Missed ";" SPANK SPANK SPANK!!!
> > > 
> > > BSpec: 17524
> > > 
> > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_reg.h  | 2 ++
> > >  drivers/gpu/drm/i915/intel_psr.c | 3 +++
> > >  2 files changed, 5 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 16ce9c609c65..a7697909e0c9 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -4205,6 +4205,8 @@ enum {
> > >  #define   EDP_PSR_TP2_TP3_TIME_100us		(1 << 8)
> > >  #define   EDP_PSR_TP2_TP3_TIME_2500us		(2 << 8)
> > >  #define   EDP_PSR_TP2_TP3_TIME_0us		(3 << 8)
> > > +#define   EDP_PSR_TP4_TIME_SHIFT		(6) /* ICL+ */
> > > +#define   EDP_PSR_TP4_TIME_0US			(3 <<
> > > EDP_PSR_TP4_TIME_SHIFT) /* ICL+ */
> > 
> > could we please leave this as the rest of the reg and use (3 << 6)
> > imo easier to read because the rest of reg was already there
> 
> Sure, I will change to (3 << 6)


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>



> 
> > 
> > >  #define   EDP_PSR_TP1_TIME_500us		(0 << 4)
> > >  #define   EDP_PSR_TP1_TIME_100us		(1 << 4)
> > >  #define   EDP_PSR_TP1_TIME_2500us		(2 << 4)
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index 2fa2f4c9c935..c70d735f5b93 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -442,6 +442,9 @@ static u32 psr1_tps_regs_val_get(struct
> > > intel_dp *intel_dp)
> > >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > >  	u32 val = 0;
> > >  
> > > +	if (INTEL_GEN(dev_priv) >= 11)
> > > +		val |= EDP_PSR_TP4_TIME_0US;
> > > +
> > >  	if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)
> > >  		val |= EDP_PSR_TP1_TIME_0us;
> > >  	else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100)
> > > -- 
> > > 2.21.0
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx


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  reply	other threads:[~2019-03-11 23:44 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-05 23:47 [PATCH v3 1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time José Roberto de Souza
2019-03-05 23:47 ` [PATCH v3 2/3] drm/i915/psr: Move logic to get TPS registers values to another function José Roberto de Souza
2019-03-11 23:28   ` Rodrigo Vivi
2019-03-12  0:15     ` Dhinakaran Pandiyan
2019-03-12  3:22       ` Vivi, Rodrigo
2019-03-05 23:47 ` [PATCH v3 3/3] drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR José Roberto de Souza
2019-03-11 23:34   ` Rodrigo Vivi
2019-03-11 23:38     ` Souza, Jose
2019-03-11 23:44       ` Rodrigo Vivi [this message]
2019-03-06  0:11 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time Patchwork
2019-03-06  0:12 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-06  0:39 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-06  8:33 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-11 21:59 ` [PATCH v3 1/3] " Rodrigo Vivi

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