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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time
Date: Wed, 13 Mar 2019 14:37:06 -0000	[thread overview]
Message-ID: <20190313143706.26022.57613@emeril.freedesktop.org> (raw)
In-Reply-To: <20190312195743.8829-1-jose.souza@intel.com>

== Series Details ==

Series: series starting with [v4,1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time
URL   : https://patchwork.freedesktop.org/series/57896/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
337a8cd36aa7 drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time
-:67: WARNING:LONG_LINE: line over 100 characters
#67: FILE: drivers/gpu/drm/i915/intel_bios.c:786:
+		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;

total: 0 errors, 1 warnings, 0 checks, 63 lines checked
161af2393b0b drm/i915/psr: Move logic to get TPS registers values to another function
fa0a48728c55 drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR1

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  parent reply	other threads:[~2019-03-13 14:37 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-12 19:57 [PATCH v4 1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time José Roberto de Souza
2019-03-12 19:57 ` [PATCH v4 2/3] drm/i915/psr: Move logic to get TPS registers values to another function José Roberto de Souza
2019-03-12 19:57 ` [PATCH v4 3/3] drm/i915/icl+: Always use TPS2 or TPS3 when exiting PSR1 José Roberto de Souza
2019-03-13 14:37 ` Patchwork [this message]
2019-03-13 14:38 ` ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time Patchwork
2019-03-13 14:58 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-13 19:33 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-13 21:33   ` Souza, Jose

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