From: Patchwork <patchwork@emeril.freedesktop.org>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/ehl: Add EHL platform info and PCI IDs
Date: Thu, 14 Mar 2019 02:24:55 -0000 [thread overview]
Message-ID: <20190314022455.26023.31090@emeril.freedesktop.org> (raw)
In-Reply-To: <20190313211144.4842-1-rodrigo.vivi@intel.com>
== Series Details ==
Series: series starting with [1/9] drm/i915/ehl: Add EHL platform info and PCI IDs
URL : https://patchwork.freedesktop.org/series/57959/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
62bc6b41a37f drm/i915/ehl: Add EHL platform info and PCI IDs
-:60: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#60: FILE: include/drm/i915_pciids.h:476:
+#define INTEL_EHL_IDS(info) \
+ INTEL_VGA_DEVICE(0x4500, info), \
+ INTEL_VGA_DEVICE(0x4571, info), \
+ INTEL_VGA_DEVICE(0x4551, info), \
+ INTEL_VGA_DEVICE(0x4541, info)
-:60: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'info' - possible side-effects?
#60: FILE: include/drm/i915_pciids.h:476:
+#define INTEL_EHL_IDS(info) \
+ INTEL_VGA_DEVICE(0x4500, info), \
+ INTEL_VGA_DEVICE(0x4571, info), \
+ INTEL_VGA_DEVICE(0x4551, info), \
+ INTEL_VGA_DEVICE(0x4541, info)
total: 1 errors, 0 warnings, 1 checks, 39 lines checked
d031b8c63dfe drm/i915/ehl: Add ElkhartLake platform
36697ceb701e drm/i915/ehl: ehl and icl are both gen11
b48543de2bec drm/i915/ehl: Add dpll mgr
2be6ae3e1c03 drm/i915/ehl: All EHL ports are combo phys
420753bfaa6e drm/i915/ehl: EHL outputs are different from ICL
63bef8abf598 drm/i915/ehl: Set proper eu slice/subslice parameters for EHL
733f2e96ec41 drm/i915/ehl: ehl has only 36bit extended ppgtt support
fa9fba049f37 drm/i915/ehl: Add Support for DMC on EHL
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next prev parent reply other threads:[~2019-03-14 2:24 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-13 21:11 [PATCH 1/9] drm/i915/ehl: Add EHL platform info and PCI IDs Rodrigo Vivi
2019-03-13 21:11 ` [PATCH 2/9] drm/i915/ehl: Add ElkhartLake platform Rodrigo Vivi
2019-03-14 20:45 ` Souza, Jose
2019-03-14 22:53 ` Lucas De Marchi
2019-03-13 21:11 ` [PATCH 3/9] drm/i915/ehl: ehl and icl are both gen11 Rodrigo Vivi
2019-03-14 21:11 ` Souza, Jose
2019-04-05 0:38 ` Lucas De Marchi
2019-03-14 22:59 ` Lucas De Marchi
2019-03-13 21:11 ` [PATCH 4/9] drm/i915/ehl: Add dpll mgr Rodrigo Vivi
2019-03-14 21:38 ` Souza, Jose
2019-03-13 21:11 ` [PATCH 5/9] drm/i915/ehl: All EHL ports are combo phys Rodrigo Vivi
2019-03-14 20:27 ` Souza, Jose
2019-03-14 23:00 ` Lucas De Marchi
2019-03-20 21:15 ` [PATCH] drm/i915/ehl: All EHL ports are combo phys (v2) Bob Paauwe
2019-03-20 21:20 ` Souza, Jose
2019-04-02 22:17 ` Lucas De Marchi
2019-03-21 8:09 ` kbuild test robot
2019-03-21 8:37 ` kbuild test robot
2019-03-13 21:11 ` [PATCH 6/9] drm/i915/ehl: EHL outputs are different from ICL Rodrigo Vivi
2019-03-14 21:39 ` Souza, Jose
2019-03-14 23:19 ` Lucas De Marchi
2019-03-13 21:11 ` [PATCH 7/9] drm/i915/ehl: Set proper eu slice/subslice parameters for EHL Rodrigo Vivi
2019-03-14 21:40 ` Souza, Jose
2019-03-14 23:22 ` Lucas De Marchi
2019-03-13 21:11 ` [PATCH 8/9] drm/i915/ehl: ehl has only 36bit extended ppgtt support Rodrigo Vivi
2019-03-14 7:34 ` Chris Wilson
2019-03-13 21:11 ` [PATCH 9/9] drm/i915/ehl: Add Support for DMC on EHL Rodrigo Vivi
2019-03-14 21:49 ` Souza, Jose
2019-03-14 23:29 ` Lucas De Marchi
2019-03-14 2:24 ` Patchwork [this message]
2019-03-14 2:28 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915/ehl: Add EHL platform info and PCI IDs Patchwork
2019-03-14 3:07 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-14 9:30 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-14 20:43 ` [PATCH 1/9] " Souza, Jose
2019-03-14 21:34 ` ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/ehl: Add EHL platform info and PCI IDs (rev2) Patchwork
2019-03-20 23:10 ` ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/ehl: Add EHL platform info and PCI IDs (rev3) Patchwork
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