Re: [PATCH 3/5] drm/i915: Drop address size from ppgtt_type

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Thu, Mar 14, 2019 at 10:38:37PM +0000, Chris Wilson wrote:
> With the introduction of the separate addressable bits into the device
> info, we can remove the conflation of the ppgtt size from the ppgtt
> type.
> 
> Based on a patch by Bob Paauwe <bob.j.paauwe@intel.com>
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Bob Paauwe <bob.j.paauwe@intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c             | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h             | 2 --
>  drivers/gpu/drm/i915/i915_pci.c             | 4 ++--
>  drivers/gpu/drm/i915/intel_device_info.h    | 1 -
>  drivers/gpu/drm/i915/selftests/huge_pages.c | 2 +-
>  5 files changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index ad695cdc0487..a3b00ecc58c9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -348,7 +348,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
>  		value = HAS_WT(dev_priv);
>  		break;
>  	case I915_PARAM_HAS_ALIASING_PPGTT:
> -		value = min_t(int, INTEL_PPGTT(dev_priv), I915_GEM_PPGTT_FULL);
> +		value = INTEL_PPGTT(dev_priv);

I don't know the users of this param so I'm not 100% confident that this
doesn't break something.

But overall this seems the right way to go and the rest of
the patch looks correct...

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>  		break;
>  	case I915_PARAM_HAS_SEMAPHORES:
>  		value = !!(dev_priv->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4864a35ddaca..c65c2e6649df 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2457,8 +2457,6 @@ static inline unsigned int i915_sg_segment_size(void)
>  	(INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
>  #define HAS_FULL_PPGTT(dev_priv) \
>  	(INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
> -#define HAS_FULL_48BIT_PPGTT(dev_priv)	\
> -	(INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL_4LVL)
>  
>  #define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
>  	GEM_BUG_ON((sizes) == 0); \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index a13ac0f3e528..ef7410c492fd 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -498,7 +498,7 @@ static const struct intel_device_info intel_haswell_gt3_info = {
>  	.page_sizes = I915_GTT_PAGE_SIZE_4K | \
>  		      I915_GTT_PAGE_SIZE_2M, \
>  	.has_logical_ring_contexts = 1, \
> -	.ppgtt_type = INTEL_PPGTT_FULL_4LVL, \
> +	.ppgtt_type = INTEL_PPGTT_FULL, \
>  	.ppgtt_size = 48, \
>  	.has_64bit_reloc = 1, \
>  	.has_reset_engine = 1
> @@ -621,7 +621,7 @@ static const struct intel_device_info intel_skylake_gt4_info = {
>  	.has_logical_ring_contexts = 1, \
>  	.has_logical_ring_preemption = 1, \
>  	.has_guc = 1, \
> -	.ppgtt_type = INTEL_PPGTT_FULL_4LVL, \
> +	.ppgtt_type = INTEL_PPGTT_FULL, \
>  	.ppgtt_size = 48, \
>  	.has_reset_engine = 1, \
>  	.has_snoop = true, \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index b57b34c96b3d..6234570a9b17 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -80,7 +80,6 @@ enum intel_ppgtt_type {
>  	INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
>  	INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
>  	INTEL_PPGTT_FULL = I915_GEM_PPGTT_FULL,
> -	INTEL_PPGTT_FULL_4LVL,
>  };
>  
>  #define DEV_INFO_FOR_EACH_FLAG(func) \
> diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
> index e8b3f417a122..3ad7f041ae84 100644
> --- a/drivers/gpu/drm/i915/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
> @@ -1709,7 +1709,7 @@ int i915_gem_huge_page_mock_selftests(void)
>  		return -ENOMEM;
>  
>  	/* Pretend to be a device which supports the 48b PPGTT */
> -	mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL_4LVL;
> +	mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL;
>  	mkwrite_device_info(dev_priv)->ppgtt_size = 48;
>  
>  	mutex_lock(&dev_priv->drm.struct_mutex);
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx