✗ Fi.CI.CHECKPATCH: warning for GuC 32.0.3

From: Patchwork <patchwork@emeril.freedesktop.org>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for GuC 32.0.3
Date: Fri, 29 Mar 2019 23:40:18 -0000	[thread overview]
Message-ID: <20190329234018.17317.31578@emeril.freedesktop.org> (raw)
In-Reply-To: <20190329221118.17308-1-michal.wajdeczko@intel.com>

== Series Details ==

Series: GuC 32.0.3
URL   : https://patchwork.freedesktop.org/series/58760/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
07625b512895 drm/i915/guc: Don't allow GuC submission on pre-Gen11
a79bbfbbcaeb drm/i915/guc: Simplify preparation of GuC parameter block
94c06af628c8 drm/i915/guc: Update GuC firmware versions and names
281a7ab1800e drm/i915/guc: Update GuC firmware CSS header
b0fe25ecbdef drm/i915/guc: Update GuC boot parameters
172024033ca9 drm/i915/guc: Update GuC sleep status values
fafcf0016350 drm/i915/guc: Update GuC sample-forcewake command
e2444d3152fe drm/i915/guc: Always ask GuC to update power domain states
4055e1730306 drm/i915/guc: Update GuC ADS object definition
d84c83744126 drm/i915/guc: Reset GuC ADS during sanitize
2e657fbac482 drm/i915/guc: New GuC interrupt register for Gen11
36baa8c466aa drm/i915/guc: New GuC scratch registers for Gen11
dd29e99702e0 drm/i915/guc: Update GuC CTB response definition
-:45: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Oscar Mateo <oscar.mateo@intel.com>'

total: 0 errors, 1 warnings, 0 checks, 22 lines checked
a7a0c4502b4b drm/i915/guc: Enable GuC CTB communication on Gen11
051158fa445c drm/i915/huc: New HuC status register for Gen11
3b30d337fd57 drm/i915/guc: Define GuC firmware version for Icelake
c8f0b2a34b8c drm/i915/huc: Define HuC firmware version for Icelake
8c06d748e638 drm/i915/guc: Treat GuC initialization failure as -EIO
c7046bd151d8 drm/i915/guc: New GuC IDs based on engine class and instance
c0ef43eabfe1 drm/i915/guc: Make use of the SW counter field in the context descriptor
4387539fbd4e drm/i915/guc: New GuC stage descriptors
-:81: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#81: FILE: drivers/gpu/drm/i915/i915_debugfs.c:2285:
+				seq_printf(m, "\t\tHW context desc: 0x%x:0x%x\n",
+						lower_32_bits(lrc->hw_context_desc),

-:355: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#355: FILE: drivers/gpu/drm/i915/intel_guc_submission.c:194:
+	GEM_BUG_ON(!I915_SELFTEST_ONLY(client->guc->starting_proxy_id) &&
+			client->stage_id < GUC_MAX_PPAL_STAGE_DESCRIPTORS);

total: 0 errors, 0 warnings, 2 checks, 801 lines checked
58d9cb8849cd drm/i915/guc: New GuC workqueue item submission mechanism
f9208efef283 drm/i915/guc: Add support for resume-parsing wq item
-:15: WARNING:BAD_SIGN_OFF: 'Co-developed-by:' is the preferred signature form
#15: 
Co-Developed-by: Michel Thierry <michel.thierry@intel.com>

-:16: WARNING:BAD_SIGN_OFF: 'Co-developed-by:' is the preferred signature form
#16: 
Co-Developed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

total: 0 errors, 2 warnings, 0 checks, 125 lines checked
5c5d17e155bf drm/i915/guc: New reset-engine command
-:11: WARNING:BAD_SIGN_OFF: 'Co-developed-by:' is the preferred signature form
#11: 
Co-Developed-by: Michel Thierry <michel.thierry@intel.com>

total: 0 errors, 1 warnings, 0 checks, 102 lines checked
c9d66fb31815 drm/i915/guc: New engine-reset-complete message
dbfc310b9339 drm/i915/guc: Properly capture & release GuC interrupts on Gen11
e174c48db89e drm/i915/guc: Create vfuncs for the GuC interrupts control functions
1cb3055da417 drm/i915/guc: Correctly handle GuC interrupts on Gen11
e693e55b1a34 HAX: prevent CI failures on pre-Gen11 configs with forced GuC
915a4cffdbb4 HAX: Enable HuC

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