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From: Manasi Navare <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Manasi Navare <manasi.d.navare@intel.comk>
Subject: Re: [PATCH 1/2] drm/i915: Do not enable FEC without DSC
Date: Thu, 11 Apr 2019 12:11:42 -0700	[thread overview]
Message-ID: <20190411191141.GD17858@intel.com> (raw)
In-Reply-To: <20190326144903.6617-1-ville.syrjala@linux.intel.com>

On Tue, Mar 26, 2019 at 04:49:02PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently we enable FEC even when DSC is no used. While that is
> theoretically valid supposedly there isn't much of a benefit from
> this. But more importantly we do not account for the FEC link
> bandwidth overhead (2.4%) in the non-DSC link bandwidth computations.
> So the code may think we have enough bandwidth when we in fact
> do not.
> 
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.comk>

There is a typo in the email address:
manasi.d.navare@intel.com

> Fixes: 240999cf339f ("i915/dp/fec: Add fec_enable to the crtc state.")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Makes sense to me

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 326de12c3f44..bbf678561509 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1925,6 +1925,9 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	int pipe_bpp;
>  	int ret;
>  
> +	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> +		intel_dp_supports_fec(intel_dp, pipe_config);
> +
>  	if (!intel_dp_supports_dsc(intel_dp, pipe_config))
>  		return -EINVAL;
>  
> @@ -2168,9 +2171,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
>  		return -EINVAL;
>  
> -	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> -				  intel_dp_supports_fec(intel_dp, pipe_config);
> -
>  	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
>  	if (ret < 0)
>  		return ret;
> -- 
> 2.19.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  parent reply	other threads:[~2019-04-11 19:09 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-26 14:49 [PATCH 1/2] drm/i915: Do not enable FEC without DSC Ville Syrjala
2019-03-26 14:49 ` [PATCH 2/2] drm/i915: Clean up DSC vs. not bpp handling Ville Syrjala
2019-03-26 16:02   ` Manasi Navare
2019-04-11 18:27     ` Ville Syrjälä
2019-03-26 16:00 ` [PATCH 1/2] drm/i915: Do not enable FEC without DSC Manasi Navare
2019-03-26 16:16   ` Ville Syrjälä
2019-03-26 18:10     ` Manasi Navare
2019-03-27 13:13       ` Ville Syrjälä
2019-03-26 19:20 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2019-03-27  4:02 ` ✓ Fi.CI.IGT: " Patchwork
2019-04-11 19:11 ` Manasi Navare [this message]
2019-04-11 20:49   ` [PATCH 1/2] " Ville Syrjälä

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