[PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[matthew.s.atwood]

From: Matt Atwood <matthew.s.atwood@intel.com>

intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
use before encoder_type is set. This caused GEN11+ to incorrectly strip
HBR3 from source rates. Move intel_dp_set_source_rates() to after
encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
usages.

Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
changes per BSPEC")
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 24b56b2a76c8..a4490bcad684 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
  *
  * If a CPU or PCH DP output is attached to an eDP panel, this function
  * will return true, and false otherwise.
+ *
+ * This function is not safe to use prior to encoder type being set.
  */
 bool intel_dp_is_edp(struct intel_dp *intel_dp)
 {
@@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 		 intel_dig_port->max_lanes, port_name(port)))
 		return false;
 
-	intel_dp_set_source_rates(intel_dp);
-
 	intel_dp->reset_link_params = true;
 	intel_dp->pps_pipe = INVALID_PIPE;
 	intel_dp->active_pipe = INVALID_PIPE;
@@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
 			port_name(port));
 
+	intel_dp_set_source_rates(intel_dp);
+
 	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
 	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
 
-- 
2.17.2

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✓ Fi.CI.BAT: success for drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Correctly advertise HBR3 for GEN11+
URL   : https://patchwork.freedesktop.org/series/61546/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6182 -> Patchwork_13164
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/

Known issues
------------

  Here are the changes found in Patchwork_13164 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-small-copy:
    - fi-icl-dsi:         [PASS][1] -> [DMESG-WARN][2] ([fdo#106107])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-icl-dsi/igt@gem_mmap_gtt@basic-small-copy.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-icl-dsi/igt@gem_mmap_gtt@basic-small-copy.html

  * igt@gem_mmap_gtt@basic-write:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-icl-u3/igt@gem_mmap_gtt@basic-write.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-icl-u3/igt@gem_mmap_gtt@basic-write.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [PASS][5] -> [FAIL][6] ([fdo#108511])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_evict:
    - fi-bsw-kefka:       [PASS][7] -> [DMESG-WARN][8] ([fdo#107709])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-bsw-kefka/igt@i915_selftest@live_evict.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-bsw-kefka/igt@i915_selftest@live_evict.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-blb-e6850:       [PASS][9] -> [INCOMPLETE][10] ([fdo#107718])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
#### Possible fixes ####

  * {igt@i915_selftest@live_mman}:
    - fi-bxt-j4205:       [TIMEOUT][11] ([fdo#110818 ]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-bxt-j4205/igt@i915_selftest@live_mman.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-bxt-j4205/igt@i915_selftest@live_mman.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
    - fi-icl-u3:          [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-icl-u3/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-icl-u3/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [FAIL][15] ([fdo#103167]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
  [fdo#110818 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110818 


Participating hosts (50 -> 45)
------------------------------

  Additional (1): fi-bsw-n3050 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-kbl-7560u fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_6182 -> Patchwork_13164

  CI_DRM_6182: 63e1cb5d17f931ee65e93fe45d593b45b5c863f5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5029: 5aeacd5cc3fc37ff9e5dccb9e8ae63acdc12e521 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13164: 4a63660fc510da8f3945a4086d6cd340980fe5a9 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4a63660fc510 drm/i915/dp: Correctly advertise HBR3 for GEN11+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Manasi Navare]

On Mon, Jun 03, 2019 at 02:49:40PM -0700, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
> 
> intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
> use before encoder_type is set. This caused GEN11+ to incorrectly strip
> HBR3 from source rates. Move intel_dp_set_source_rates() to after
> encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
> usages.

May be also add a WARN_ON inside intel_dp_is_edp() for encoder->type
still set to INTEL_OUTPUT_DDI

> 
> Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
> changes per BSPEC")
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 24b56b2a76c8..a4490bcad684 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
>   *
>   * If a CPU or PCH DP output is attached to an eDP panel, this function
>   * will return true, and false otherwise.
> + *
> + * This function is not safe to use prior to encoder type being set.
>   */
>  bool intel_dp_is_edp(struct intel_dp *intel_dp)

IMHO, this comment and WARN_ON like I mentioned above should be a separate
patch since its just a cleanup and no functional change.

Manasi

>  {
> @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>  		 intel_dig_port->max_lanes, port_name(port)))
>  		return false;
>  
> -	intel_dp_set_source_rates(intel_dp);
> -
>  	intel_dp->reset_link_params = true;
>  	intel_dp->pps_pipe = INVALID_PIPE;
>  	intel_dp->active_pipe = INVALID_PIPE;
> @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>  			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
>  			port_name(port));
>  
> +	intel_dp_set_source_rates(intel_dp);
> +
>  	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
>  	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
>  
> -- 
> 2.17.2
> 
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✗ Fi.CI.IGT: failure for drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Correctly advertise HBR3 for GEN11+
URL   : https://patchwork.freedesktop.org/series/61546/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6182_full -> Patchwork_13164_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_13164_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13164_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_13164_full:

### IGT changes ###

#### Possible regressions ####

  * igt@perf_pmu@rc6-runtime-pm:
    - shard-iclb:         [PASS][1] -> [SKIP][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb7/igt@perf_pmu@rc6-runtime-pm.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb2/igt@perf_pmu@rc6-runtime-pm.html

  

### Piglit changes ###

#### Possible regressions ####

  * spec@glsl-1.30@execution@texelfetch fs sampler3d 98x1x9-98x129x9 (NEW):
    - {pig-snb-2600}:     NOTRUN -> [FAIL][3] +3 similar issues
   [3]: None

  
New tests
---------

  New tests have been introduced between CI_DRM_6182_full and Patchwork_13164_full:

### New Piglit tests (4) ###

  * spec@glsl-1.30@execution@tex-miplevel-selection texturelod 1dshadow:
    - Statuses : 1 fail(s)
    - Exec time: [8.71] s

  * spec@glsl-1.30@execution@tex-miplevel-selection texturelod cube:
    - Statuses : 1 fail(s)
    - Exec time: [8.70] s

  * spec@glsl-1.30@execution@texelfetch fs sampler2d 281x1-281x281:
    - Statuses : 1 fail(s)
    - Exec time: [14.70] s

  * spec@glsl-1.30@execution@texelfetch fs sampler3d 98x1x9-98x129x9:
    - Statuses : 1 fail(s)
    - Exec time: [13.21] s

  

Known issues
------------

  Here are the changes found in Patchwork_13164_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@hang:
    - shard-iclb:         [PASS][4] -> [FAIL][5] ([fdo#109677])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb3/igt@gem_mmap_gtt@hang.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb6/igt@gem_mmap_gtt@hang.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [PASS][6] -> [INCOMPLETE][7] ([fdo#104108])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-skl8/igt@gem_softpin@noreloc-s3.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-skl8/igt@gem_softpin@noreloc-s3.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled:
    - shard-skl:          [PASS][8] -> [FAIL][9] ([fdo#103184] / [fdo#103232])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled.html

  * igt@kms_flip@2x-plain-flip:
    - shard-hsw:          [PASS][10] -> [SKIP][11] ([fdo#109271]) +25 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-hsw5/igt@kms_flip@2x-plain-flip.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-hsw1/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][12] -> [FAIL][13] ([fdo#105363])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [PASS][14] -> [INCOMPLETE][15] ([fdo#103540])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-hsw2/igt@kms_flip@flip-vs-suspend.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-hsw2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [PASS][16] -> [FAIL][17] ([fdo#103167]) +5 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [PASS][18] -> [SKIP][19] ([fdo#109441]) +3 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][20] -> [FAIL][21] ([fdo#99912])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-apl4/igt@kms_setmode@basic.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-apl7/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-apl:          [PASS][22] -> [DMESG-WARN][23] ([fdo#108566]) +2 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-apl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [DMESG-WARN][24] ([fdo#108566]) -> [PASS][25] +4 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-apl5/igt@gem_ctx_isolation@bcs0-s3.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-apl1/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-hsw:          [FAIL][26] ([fdo#108686]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-hsw2/igt@gem_tiled_swapping@non-threaded.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-hsw6/igt@gem_tiled_swapping@non-threaded.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-glk:          [FAIL][28] ([fdo#104873]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-glk3/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-glk6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][30] ([fdo#109349]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          [FAIL][32] ([fdo#105363]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][34] ([fdo#103167]) -> [PASS][35] +4 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [FAIL][36] ([fdo#103166]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][38] ([fdo#109441]) -> [PASS][39] +2 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [FAIL][40] ([fdo#99912]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-hsw5/igt@kms_setmode@basic.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-hsw1/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-skl:          [INCOMPLETE][42] ([fdo#104108]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-skl1/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-skl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  
#### Warnings ####

  * igt@gem_mmap_gtt@forked-big-copy-odd:
    - shard-iclb:         [INCOMPLETE][44] ([fdo#107713] / [fdo#109100]) -> [TIMEOUT][45] ([fdo#109673])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-iclb2/igt@gem_mmap_gtt@forked-big-copy-odd.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-iclb5/igt@gem_mmap_gtt@forked-big-copy-odd.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tilingchange:
    - shard-skl:          [FAIL][46] ([fdo#103167]) -> [FAIL][47] ([fdo#108040])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6182/shard-skl7/igt@kms_frontbuffer_tracking@fbcpsr-tilingchange.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-tilingchange.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
  [fdo#109677]: https://bugs.freedesktop.org/show_bug.cgi?id=109677
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 11)
------------------------------

  Additional (1): pig-snb-2600 


Build changes
-------------

  * Linux: CI_DRM_6182 -> Patchwork_13164

  CI_DRM_6182: 63e1cb5d17f931ee65e93fe45d593b45b5c863f5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5029: 5aeacd5cc3fc37ff9e5dccb9e8ae63acdc12e521 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13164: 4a63660fc510da8f3945a4086d6cd340980fe5a9 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13164/
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Ville Syrjälä]

On Mon, Jun 03, 2019 at 02:49:40PM -0700, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
> 
> intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
> use before encoder_type is set. This caused GEN11+ to incorrectly strip
> HBR3 from source rates. Move intel_dp_set_source_rates() to after
> encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
> usages.
> 
> Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
> changes per BSPEC")
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 24b56b2a76c8..a4490bcad684 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
>   *
>   * If a CPU or PCH DP output is attached to an eDP panel, this function
>   * will return true, and false otherwise.
> + *
> + * This function is not safe to use prior to encoder type being set.
>   */
>  bool intel_dp_is_edp(struct intel_dp *intel_dp)
>  {
> @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>  		 intel_dig_port->max_lanes, port_name(port)))
>  		return false;
>  
> -	intel_dp_set_source_rates(intel_dp);
> -
>  	intel_dp->reset_link_params = true;
>  	intel_dp->pps_pipe = INVALID_PIPE;
>  	intel_dp->active_pipe = INVALID_PIPE;
> @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>  			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
>  			port_name(port));
>  
> +	intel_dp_set_source_rates(intel_dp);
> +

I would suggest moving the encoder->type setup earlier so that we might
avoid hitting this same problem in the future.

>  	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
>  	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
>  
> -- 
> 2.17.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Ville Syrjälä]

On Tue, Jun 04, 2019 at 03:51:58PM +0300, Ville Syrjälä wrote:
> On Mon, Jun 03, 2019 at 02:49:40PM -0700, matthew.s.atwood@intel.com wrote:
> > From: Matt Atwood <matthew.s.atwood@intel.com>
> > 
> > intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
> > use before encoder_type is set. This caused GEN11+ to incorrectly strip
> > HBR3 from source rates. Move intel_dp_set_source_rates() to after
> > encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
> > usages.
> > 
> > Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
> > changes per BSPEC")
> > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 24b56b2a76c8..a4490bcad684 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
> >   *
> >   * If a CPU or PCH DP output is attached to an eDP panel, this function
> >   * will return true, and false otherwise.
> > + *
> > + * This function is not safe to use prior to encoder type being set.
> >   */
> >  bool intel_dp_is_edp(struct intel_dp *intel_dp)
> >  {
> > @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> >  		 intel_dig_port->max_lanes, port_name(port)))
> >  		return false;
> >  
> > -	intel_dp_set_source_rates(intel_dp);
> > -
> >  	intel_dp->reset_link_params = true;
> >  	intel_dp->pps_pipe = INVALID_PIPE;
> >  	intel_dp->active_pipe = INVALID_PIPE;
> > @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> >  			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
> >  			port_name(port));
> >  
> > +	intel_dp_set_source_rates(intel_dp);
> > +
> 
> I would suggest moving the encoder->type setup earlier so that we might
> avoid hitting this same problem in the future.

Oh and while you're in there would be nice if you could fix up the comment
that still refers to INTEL_OUTPUT_UNKNOWN.

> 
> >  	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
> >  	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
> >  
> > -- 
> > 2.17.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Manasi Navare]

On Tue, Jun 04, 2019 at 03:51:58PM +0300, Ville Syrjälä wrote:
> On Mon, Jun 03, 2019 at 02:49:40PM -0700, matthew.s.atwood@intel.com wrote:
> > From: Matt Atwood <matthew.s.atwood@intel.com>
> > 
> > intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
> > use before encoder_type is set. This caused GEN11+ to incorrectly strip
> > HBR3 from source rates. Move intel_dp_set_source_rates() to after
> > encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
> > usages.
> > 
> > Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
> > changes per BSPEC")
> > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 24b56b2a76c8..a4490bcad684 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
> >   *
> >   * If a CPU or PCH DP output is attached to an eDP panel, this function
> >   * will return true, and false otherwise.
> > + *
> > + * This function is not safe to use prior to encoder type being set.
> >   */
> >  bool intel_dp_is_edp(struct intel_dp *intel_dp)
> >  {
> > @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> >  		 intel_dig_port->max_lanes, port_name(port)))
> >  		return false;
> >  
> > -	intel_dp_set_source_rates(intel_dp);
> > -
> >  	intel_dp->reset_link_params = true;
> >  	intel_dp->pps_pipe = INVALID_PIPE;
> >  	intel_dp->active_pipe = INVALID_PIPE;
> > @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> >  			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
> >  			port_name(port));
> >  
> > +	intel_dp_set_source_rates(intel_dp);
> > +
> 
> I would suggest moving the encoder->type setup earlier so that we might
> avoid hitting this same problem in the future.

IMHO, Ideally this encoder->type should be set in intel_ddi_init or intel_ddi_init_dp_connector()
for us to never get into a situation where intel_dp_is_edp() is called before encoder->type is set.

Is that what you are recommending?

Manasi

> 
> >  	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
> >  	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
> >  
> > -- 
> > 2.17.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Ville Syrjälä]

On Tue, Jun 04, 2019 at 12:44:48PM -0700, Manasi Navare wrote:
> On Tue, Jun 04, 2019 at 03:51:58PM +0300, Ville Syrjälä wrote:
> > On Mon, Jun 03, 2019 at 02:49:40PM -0700, matthew.s.atwood@intel.com wrote:
> > > From: Matt Atwood <matthew.s.atwood@intel.com>
> > > 
> > > intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
> > > use before encoder_type is set. This caused GEN11+ to incorrectly strip
> > > HBR3 from source rates. Move intel_dp_set_source_rates() to after
> > > encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
> > > usages.
> > > 
> > > Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
> > > changes per BSPEC")
> > > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
> > >  1 file changed, 4 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > index 24b56b2a76c8..a4490bcad684 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
> > >   *
> > >   * If a CPU or PCH DP output is attached to an eDP panel, this function
> > >   * will return true, and false otherwise.
> > > + *
> > > + * This function is not safe to use prior to encoder type being set.
> > >   */
> > >  bool intel_dp_is_edp(struct intel_dp *intel_dp)
> > >  {
> > > @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> > >  		 intel_dig_port->max_lanes, port_name(port)))
> > >  		return false;
> > >  
> > > -	intel_dp_set_source_rates(intel_dp);
> > > -
> > >  	intel_dp->reset_link_params = true;
> > >  	intel_dp->pps_pipe = INVALID_PIPE;
> > >  	intel_dp->active_pipe = INVALID_PIPE;
> > > @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> > >  			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
> > >  			port_name(port));
> > >  
> > > +	intel_dp_set_source_rates(intel_dp);
> > > +
> > 
> > I would suggest moving the encoder->type setup earlier so that we might
> > avoid hitting this same problem in the future.
> 
> IMHO, Ideally this encoder->type should be set in intel_ddi_init or intel_ddi_init_dp_connector()
> for us to never get into a situation where intel_dp_is_edp() is called before encoder->type is set.
> 
> Is that what you are recommending?

I was thinking just moving it to the start of intel_dp_init_connector(),
but I suppose moving it even earlier would be possible since intel_ddi.c
doesn't seem to do any of the eDP->HDMI fallback we needed to add for
VLV/CHV.

> 
> Manasi
> 
> > 
> > >  	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
> > >  	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
> > >  
> > > -- 
> > > 2.17.2
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
> > -- 
> > Ville Syrjälä
> > Intel
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Atwood, Matthew S]

On Tue, 2019-06-04 at 23:16 +0300, Ville Syrjälä wrote:
> On Tue, Jun 04, 2019 at 12:44:48PM -0700, Manasi Navare wrote:
> > On Tue, Jun 04, 2019 at 03:51:58PM +0300, Ville Syrjälä wrote:
> > > On Mon, Jun 03, 2019 at 02:49:40PM -0700, 
> > > matthew.s.atwood@intel.com wrote:
> > > > From: Matt Atwood <matthew.s.atwood@intel.com>
> > > > 
> > > > intel_dp_set_source_rates() calls intel_dp_is_edp(), which is
> > > > unsafe to
> > > > use before encoder_type is set. This caused GEN11+ to
> > > > incorrectly strip
> > > > HBR3 from source rates. Move intel_dp_set_source_rates() to
> > > > after
> > > > encoder_type is set. Add comment to intel_dp_is_edp()
> > > > describing unsafe
> > > > usages.
> > > > 
> > > > Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing
> > > > programming
> > > > changes per BSPEC")
> > > > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
> > > >  1 file changed, 4 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > > b/drivers/gpu/drm/i915/intel_dp.c
> > > > index 24b56b2a76c8..a4490bcad684 100644
> > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] =
> > > > {1, 2, 4};
> > > >   *
> > > >   * If a CPU or PCH DP output is attached to an eDP panel, this
> > > > function
> > > >   * will return true, and false otherwise.
> > > > + *
> > > > + * This function is not safe to use prior to encoder type
> > > > being set.
> > > >   */
> > > >  bool intel_dp_is_edp(struct intel_dp *intel_dp)
> > > >  {
> > > > @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct
> > > > intel_digital_port *intel_dig_port,
> > > >  		 intel_dig_port->max_lanes, port_name(port)))
> > > >  		return false;
> > > >  
> > > > -	intel_dp_set_source_rates(intel_dp);
> > > > -
> > > >  	intel_dp->reset_link_params = true;
> > > >  	intel_dp->pps_pipe = INVALID_PIPE;
> > > >  	intel_dp->active_pipe = INVALID_PIPE;
> > > > @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct
> > > > intel_digital_port *intel_dig_port,
> > > >  			type == DRM_MODE_CONNECTOR_eDP ? "eDP"
> > > > : "DP",
> > > >  			port_name(port));
> > > >  
> > > > +	intel_dp_set_source_rates(intel_dp);
> > > > +
> > > 
> > > I would suggest moving the encoder->type setup earlier so that we
> > > might
> > > avoid hitting this same problem in the future.
> > 
> > IMHO, Ideally this encoder->type should be set in intel_ddi_init or
> > intel_ddi_init_dp_connector()
> > for us to never get into a situation where intel_dp_is_edp() is
> > called before encoder->type is set.
> > 
> > Is that what you are recommending?
> 
> I was thinking just moving it to the start of
> intel_dp_init_connector(),
> but I suppose moving it even earlier would be possible since
> intel_ddi.c
> doesn't seem to do any of the eDP->HDMI fallback we needed to add for
> VLV/CHV.
ack
> 
> > 
> > Manasi
> > 
> > > 
> > > >  	drm_connector_init(dev, connector,
> > > > &intel_dp_connector_funcs, type);
> > > >  	drm_connector_helper_add(connector,
> > > > &intel_dp_connector_helper_funcs);
> > > >  
> > > > -- 
> > > > 2.17.2
> > > > 
> > > > _______________________________________________
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > 
> > > -- 
> > > Ville Syrjälä
> > > Intel
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
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Re: [PATCH] drm/i915/dp: Correctly advertise HBR3 for GEN11+

[Clinton Taylor]

Tested-by: Clint Taylor <Clinton.A.Taylor@intel.com>

-Clint


On 6/3/19 2:49 PM, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
>
> intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to
> use before encoder_type is set. This caused GEN11+ to incorrectly strip
> HBR3 from source rates. Move intel_dp_set_source_rates() to after
> encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe
> usages.
>
> Fixes: b265a2a6255f5 ("drm/i915/icl: combo port vswing programming
> changes per BSPEC")
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 24b56b2a76c8..a4490bcad684 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -141,6 +141,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
>    *
>    * If a CPU or PCH DP output is attached to an eDP panel, this function
>    * will return true, and false otherwise.
> + *
> + * This function is not safe to use prior to encoder type being set.
>    */
>   bool intel_dp_is_edp(struct intel_dp *intel_dp)
>   {
> @@ -7342,8 +7344,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>   		 intel_dig_port->max_lanes, port_name(port)))
>   		return false;
>   
> -	intel_dp_set_source_rates(intel_dp);
> -
>   	intel_dp->reset_link_params = true;
>   	intel_dp->pps_pipe = INVALID_PIPE;
>   	intel_dp->active_pipe = INVALID_PIPE;
> @@ -7388,6 +7388,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
>   			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
>   			port_name(port));
>   
> +	intel_dp_set_source_rates(intel_dp);
> +
>   	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
>   	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
>   
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