* [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT
@ 2019-08-13 17:41 Stuart Summers
2019-08-13 17:41 ` [PATCH 2/3] drm/i915: Print CCID for all renderCS Stuart Summers
` (5 more replies)
0 siblings, 6 replies; 14+ messages in thread
From: Stuart Summers @ 2019-08-13 17:41 UTC (permalink / raw)
To: intel-gfx
Replace GEM_BUG_ON with explicit check for render class
when doing the kernel context switch.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index 409d764f8c6d..04ea9bbb88ce 100644
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -1781,9 +1781,7 @@ static int switch_context(struct i915_request *rq)
}
}
- if (rq->hw_context->state) {
- GEM_BUG_ON(engine->id != RCS0);
-
+ if (engine->class == RENDER_CLASS && rq->hw_context->state) {
/*
* The kernel context(s) is treated as pure scratch and is not
* expected to retain any state (as we sacrifice it during
--
2.22.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] drm/i915: Print CCID for all renderCS
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
@ 2019-08-13 17:41 ` Stuart Summers
2019-08-13 17:55 ` Chris Wilson
2019-08-13 17:41 ` [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine Stuart Summers
` (4 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Stuart Summers @ 2019-08-13 17:41 UTC (permalink / raw)
To: intel-gfx
Use render class instead of RCS0 when printing CCID.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index c7b241417ee1..50b13ca29877 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1202,7 +1202,7 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine,
unsigned long flags;
u64 addr;
- if (engine->id == RCS0 && IS_GEN_RANGE(dev_priv, 4, 7))
+ if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7))
drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID));
drm_printf(m, "\tRING_START: 0x%08x\n",
ENGINE_READ(engine, RING_START));
--
2.22.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
2019-08-13 17:41 ` [PATCH 2/3] drm/i915: Print CCID for all renderCS Stuart Summers
@ 2019-08-13 17:41 ` Stuart Summers
2019-08-13 18:03 ` Chris Wilson
2019-08-13 17:54 ` [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Chris Wilson
` (3 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Stuart Summers @ 2019-08-13 17:41 UTC (permalink / raw)
To: intel-gfx
In some debug scenarios, it might be interesting to load
a platform without support for the render command streamer.
Add a module parameter to allow this platform configuration.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 3 +++
drivers/gpu/drm/i915/i915_params.h | 3 ++-
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 296452f9efe4..9c5115f0e0b1 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -178,6 +178,9 @@ i915_param_named(enable_gvt, bool, 0400,
"Enable support for Intel GVT-g graphics virtualization host support(default:false)");
#endif
+i915_param_named_unsafe(enable_rcs, bool, 0400,
+ "Enable the render command streamer. (default: true)");
+
static __always_inline void _print_param(struct drm_printer *p,
const char *name,
const char *type,
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index d29ade3b7de6..1f07ad5973df 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -77,7 +77,8 @@ struct drm_printer;
param(bool, verbose_state_checks, true) \
param(bool, nuclear_pageflip, false) \
param(bool, enable_dp_mst, true) \
- param(bool, enable_gvt, false)
+ param(bool, enable_gvt, false) \
+ param(bool, enable_rcs, true)
#define MEMBER(T, member, ...) T member;
struct i915_params {
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index f99c9fd497b2..2a80b0d61155 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -1042,4 +1042,7 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
DRM_DEBUG_DRIVER("vebox enable: %04x, instances: %04lx\n",
vebox_mask, VEBOX_MASK(dev_priv));
GEM_BUG_ON(vebox_mask != VEBOX_MASK(dev_priv));
+
+ if (!i915_modparams.enable_rcs)
+ info->engine_mask &= ~BIT(RCS0);
}
--
2.22.0
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
2019-08-13 17:41 ` [PATCH 2/3] drm/i915: Print CCID for all renderCS Stuart Summers
2019-08-13 17:41 ` [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine Stuart Summers
@ 2019-08-13 17:54 ` Chris Wilson
2019-08-13 18:00 ` Stuart Summers
2019-08-13 18:41 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-08-13 17:54 UTC (permalink / raw)
To: Stuart Summers, intel-gfx
Quoting Stuart Summers (2019-08-13 18:41:19)
> Replace GEM_BUG_ON with explicit check for render class
> when doing the kernel context switch.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> index 409d764f8c6d..04ea9bbb88ce 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> @@ -1781,9 +1781,7 @@ static int switch_context(struct i915_request *rq)
> }
> }
>
> - if (rq->hw_context->state) {
> - GEM_BUG_ON(engine->id != RCS0);
> -
> + if (engine->class == RENDER_CLASS && rq->hw_context->state) {
It would come as some surprise for this not to be rcs0. I don't think we
are prepared for that on legacy HW :)
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] drm/i915: Print CCID for all renderCS
2019-08-13 17:41 ` [PATCH 2/3] drm/i915: Print CCID for all renderCS Stuart Summers
@ 2019-08-13 17:55 ` Chris Wilson
2019-08-14 9:02 ` Chris Wilson
0 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-08-13 17:55 UTC (permalink / raw)
To: Stuart Summers, intel-gfx
Quoting Stuart Summers (2019-08-13 18:41:20)
> Use render class instead of RCS0 when printing CCID.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
One day, one day, this will be using some lists of registers.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT
2019-08-13 17:54 ` [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Chris Wilson
@ 2019-08-13 18:00 ` Stuart Summers
2019-08-13 18:05 ` Chris Wilson
0 siblings, 1 reply; 14+ messages in thread
From: Stuart Summers @ 2019-08-13 18:00 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Tue, 2019-08-13 at 18:54 +0100, Chris Wilson wrote:
> Quoting Stuart Summers (2019-08-13 18:41:19)
> > Replace GEM_BUG_ON with explicit check for render class
> > when doing the kernel context switch.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 4 +---
> > 1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > index 409d764f8c6d..04ea9bbb88ce 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > @@ -1781,9 +1781,7 @@ static int switch_context(struct i915_request
> > *rq)
> > }
> > }
> >
> > - if (rq->hw_context->state) {
> > - GEM_BUG_ON(engine->id != RCS0);
> > -
> > + if (engine->class == RENDER_CLASS && rq->hw_context->state)
> > {
>
> It would come as some surprise for this not to be rcs0. I don't think
> we
> are prepared for that on legacy HW :)
Heh, I will admit that this isn't a strict requirement but thought it
would be nice to have. If you're opposed we can drop this.
Thanks,
Stuart
> -Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine
2019-08-13 17:41 ` [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine Stuart Summers
@ 2019-08-13 18:03 ` Chris Wilson
2019-08-13 18:11 ` Chris Wilson
0 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-08-13 18:03 UTC (permalink / raw)
To: Stuart Summers, intel-gfx
Quoting Stuart Summers (2019-08-13 18:41:21)
> In some debug scenarios, it might be interesting to load
> a platform without support for the render command streamer.
> Add a module parameter to allow this platform configuration.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Interesting, aside from that we shall never add a new modparam for users
to beat us with except under extreme duress, I would have made this a
ring_mask. Default to -1ull, mask off the rings you wish to exclude.
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT
2019-08-13 18:00 ` Stuart Summers
@ 2019-08-13 18:05 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-08-13 18:05 UTC (permalink / raw)
To: Stuart Summers, intel-gfx
Quoting Stuart Summers (2019-08-13 19:00:18)
> On Tue, 2019-08-13 at 18:54 +0100, Chris Wilson wrote:
> > Quoting Stuart Summers (2019-08-13 18:41:19)
> > > Replace GEM_BUG_ON with explicit check for render class
> > > when doing the kernel context switch.
> > >
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 4 +---
> > > 1 file changed, 1 insertion(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > > b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > > index 409d764f8c6d..04ea9bbb88ce 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> > > @@ -1781,9 +1781,7 @@ static int switch_context(struct i915_request
> > > *rq)
> > > }
> > > }
> > >
> > > - if (rq->hw_context->state) {
> > > - GEM_BUG_ON(engine->id != RCS0);
> > > -
> > > + if (engine->class == RENDER_CLASS && rq->hw_context->state)
> > > {
> >
> > It would come as some surprise for this not to be rcs0. I don't think
> > we
> > are prepared for that on legacy HW :)
>
> Heh, I will admit that this isn't a strict requirement but thought it
> would be nice to have. If you're opposed we can drop this.
I think this is more a summation of what was going through the
programmers mind at the time "this had better be rcs0 or we've screwed
up badly and I have no idea what's going on or how the HW is going to
respond" :)
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine
2019-08-13 18:03 ` Chris Wilson
@ 2019-08-13 18:11 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-08-13 18:11 UTC (permalink / raw)
To: Stuart Summers, intel-gfx
Quoting Chris Wilson (2019-08-13 19:03:38)
> Quoting Stuart Summers (2019-08-13 18:41:21)
> > In some debug scenarios, it might be interesting to load
> > a platform without support for the render command streamer.
> > Add a module parameter to allow this platform configuration.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>
> Interesting, aside from that we shall never add a new modparam for users
> to beat us with except under extreme duress, I would have made this a
> ring_mask. Default to -1ull, mask off the rings you wish to exclude.
For the use I have in mind, we will have to treat the ids as uabi. So it
can't be a simple case of matching up to our internal mask. I guess it
will just have to be a list of correspondences.
-Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Use render class for MI_SET_CONTEXT
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
` (2 preceding siblings ...)
2019-08-13 17:54 ` [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Chris Wilson
@ 2019-08-13 18:41 ` Patchwork
2019-08-13 19:03 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-14 6:03 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-08-13 18:41 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Use render class for MI_SET_CONTEXT
URL : https://patchwork.freedesktop.org/series/65143/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5b350dea3606 drm/i915: Use render class for MI_SET_CONTEXT
413c907ef6c0 drm/i915: Print CCID for all renderCS
df854246461d drm/i915: Add module parameter to remove RCS engine
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/i915_params.c:182:
+i915_param_named_unsafe(enable_rcs, bool, 0400,
+ "Enable the render command streamer. (default: true)");
total: 0 errors, 0 warnings, 1 checks, 25 lines checked
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^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Use render class for MI_SET_CONTEXT
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
` (3 preceding siblings ...)
2019-08-13 18:41 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork
@ 2019-08-13 19:03 ` Patchwork
2019-08-14 6:03 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-08-13 19:03 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Use render class for MI_SET_CONTEXT
URL : https://patchwork.freedesktop.org/series/65143/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6697 -> Patchwork_14000
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/
Known issues
------------
Here are the changes found in Patchwork_14000 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap_gtt@basic:
- fi-glk-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#103359] / [k.org#198133])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/fi-glk-dsi/igt@gem_mmap_gtt@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/fi-glk-dsi/igt@gem_mmap_gtt@basic.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][5] -> [FAIL][6] ([fdo#108511])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [PASS][7] -> [DMESG-FAIL][8] ([fdo#111108])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][9] -> [DMESG-WARN][10] ([fdo#102614])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@i915_selftest@live_gem_contexts:
- {fi-icl-guc}: [INCOMPLETE][11] ([fdo#107713]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/fi-icl-guc/igt@i915_selftest@live_gem_contexts.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/fi-icl-guc/igt@i915_selftest@live_gem_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (53 -> 45)
------------------------------
Additional (1): fi-byt-j1900
Missing (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-byt-clapper fi-bdw-samus fi-snb-2600
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6697 -> Patchwork_14000
CI-20190529: 20190529
CI_DRM_6697: 1b6f7a0b130658be1f2b25a6d1f63115ade207d0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5132: eced11670da92bc338a162af6eeda39edd49cd12 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14000: df854246461d592b1120a37d672eb8189aa51da5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
df854246461d drm/i915: Add module parameter to remove RCS engine
413c907ef6c0 drm/i915: Print CCID for all renderCS
5b350dea3606 drm/i915: Use render class for MI_SET_CONTEXT
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Use render class for MI_SET_CONTEXT
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
` (4 preceding siblings ...)
2019-08-13 19:03 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-08-14 6:03 ` Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-08-14 6:03 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Use render class for MI_SET_CONTEXT
URL : https://patchwork.freedesktop.org/series/65143/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6697_full -> Patchwork_14000_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14000_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14000_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14000_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_eio@in-flight-contexts-10ms:
- shard-snb: [PASS][1] -> [TIMEOUT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-snb6/igt@gem_eio@in-flight-contexts-10ms.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-snb2/igt@gem_eio@in-flight-contexts-10ms.html
Known issues
------------
Here are the changes found in Patchwork_14000_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#104108])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_exec_async@concurrent-writes-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +6 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb6/igt@gem_exec_async@concurrent-writes-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb1/igt@gem_exec_async@concurrent-writes-bsd.html
* igt@gem_softpin@noreloc-s3:
- shard-apl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-apl4/igt@gem_softpin@noreloc-s3.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-apl1/igt@gem_softpin@noreloc-s3.html
* igt@gem_tiled_swapping@non-threaded:
- shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([fdo#108686])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-kbl1/igt@gem_tiled_swapping@non-threaded.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-kbl4/igt@gem_tiled_swapping@non-threaded.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-offscreen:
- shard-snb: [PASS][11] -> [SKIP][12] ([fdo#109271])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-snb1/igt@kms_cursor_crc@pipe-a-cursor-256x256-offscreen.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-snb7/igt@kms_cursor_crc@pipe-a-cursor-256x256-offscreen.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-glk: [PASS][13] -> [FAIL][14] ([fdo#104873])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-glk8/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-glk5/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: [PASS][15] -> [FAIL][16] ([fdo#105767])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-hsw: [PASS][17] -> [INCOMPLETE][18] ([fdo#103540])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-hsw6/igt@kms_flip@2x-blocking-wf_vblank.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-hsw4/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#109507])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl6/igt@kms_flip@flip-vs-suspend.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl2/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103167]) +7 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109642] / [fdo#111068])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb2/igt@kms_psr2_su@page_flip.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb7/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb2/igt@kms_psr@psr2_suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb7/igt@kms_psr@psr2_suspend.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][27] -> [FAIL][28] ([fdo#99912])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-kbl2/igt@kms_setmode@basic.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-kbl7/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-b-ts-continuation-idle-hang:
- shard-apl: [PASS][29] -> [INCOMPLETE][30] ([fdo#103927]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-apl8/igt@kms_vblank@pipe-b-ts-continuation-idle-hang.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-apl1/igt@kms_vblank@pipe-b-ts-continuation-idle-hang.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109276]) +23 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb5/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][33] ([fdo#111325]) -> [PASS][34] +6 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_tiled_swapping@non-threaded:
- shard-glk: [DMESG-WARN][35] ([fdo#108686]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-glk7/igt@gem_tiled_swapping@non-threaded.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-glk9/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [DMESG-WARN][37] ([fdo#108566]) -> [PASS][38] +6 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-apl4/igt@gem_workarounds@suspend-resume-context.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-random:
- shard-apl: [INCOMPLETE][39] ([fdo#103927]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-apl6/igt@kms_cursor_crc@pipe-a-cursor-128x42-random.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-apl8/igt@kms_cursor_crc@pipe-a-cursor-128x42-random.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [FAIL][41] ([fdo#105363]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-glk1/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-kbl: [FAIL][43] ([fdo#105363]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-kbl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [INCOMPLETE][45] ([fdo#109507]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
- shard-iclb: [INCOMPLETE][47] ([fdo#107713]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-iclb: [FAIL][49] ([fdo#103167]) -> [PASS][50] +7 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
- shard-skl: [FAIL][51] ([fdo#103167] / [fdo#110379]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl5/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl5/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-skl: [INCOMPLETE][53] ([fdo#104108]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][55] ([fdo#108145] / [fdo#110403]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][57] ([fdo#109441]) -> [PASS][58] +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf@blocking:
- shard-skl: [FAIL][59] ([fdo#110728]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl9/igt@perf@blocking.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl8/igt@perf@blocking.html
* igt@prime_vgem@wait-bsd2:
- shard-iclb: [SKIP][61] ([fdo#109276]) -> [PASS][62] +11 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb8/igt@prime_vgem@wait-bsd2.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb1/igt@prime_vgem@wait-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][63] ([fdo#111329]) -> [SKIP][64] ([fdo#109276])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [FAIL][65] ([fdo#111330]) -> [SKIP][66] ([fdo#109276])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb7/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [SKIP][67] ([fdo#109276]) -> [FAIL][68] ([fdo#111330])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-iclb8/igt@gem_mocs_settings@mocs-settings-bsd2.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-iclb1/igt@gem_mocs_settings@mocs-settings-bsd2.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- shard-skl: [FAIL][69] ([fdo#103167]) -> [FAIL][70] ([fdo#108040])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6697/shard-skl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/shard-skl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110379]: https://bugs.freedesktop.org/show_bug.cgi?id=110379
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6697 -> Patchwork_14000
CI-20190529: 20190529
CI_DRM_6697: 1b6f7a0b130658be1f2b25a6d1f63115ade207d0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5132: eced11670da92bc338a162af6eeda39edd49cd12 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14000: df854246461d592b1120a37d672eb8189aa51da5 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14000/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] drm/i915: Print CCID for all renderCS
2019-08-13 17:55 ` Chris Wilson
@ 2019-08-14 9:02 ` Chris Wilson
2019-08-14 21:59 ` Stuart Summers
0 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-08-14 9:02 UTC (permalink / raw)
To: Stuart Summers, intel-gfx
Quoting Chris Wilson (2019-08-13 18:55:46)
> Quoting Stuart Summers (2019-08-13 18:41:20)
> > Use render class instead of RCS0 when printing CCID.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>
> One day, one day, this will be using some lists of registers.
>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Pushed this patch. The first patch speaks of the panic if legacy HW does
change and we end up with the rcs context somewhere else. And the third
patch, I wish to develop into something of wider user.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] drm/i915: Print CCID for all renderCS
2019-08-14 9:02 ` Chris Wilson
@ 2019-08-14 21:59 ` Stuart Summers
0 siblings, 0 replies; 14+ messages in thread
From: Stuart Summers @ 2019-08-14 21:59 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Wed, 2019-08-14 at 10:02 +0100, Chris Wilson wrote:
> Quoting Chris Wilson (2019-08-13 18:55:46)
> > Quoting Stuart Summers (2019-08-13 18:41:20)
> > > Use render class instead of RCS0 when printing CCID.
> > >
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> >
> > One day, one day, this will be using some lists of registers.
> >
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> Pushed this patch. The first patch speaks of the panic if legacy HW
> does
> change and we end up with the rcs context somewhere else. And the
> third
> patch, I wish to develop into something of wider user.
Thanks Chris!
-Stuart
> -Chris
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-08-14 21:58 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-08-13 17:41 [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Stuart Summers
2019-08-13 17:41 ` [PATCH 2/3] drm/i915: Print CCID for all renderCS Stuart Summers
2019-08-13 17:55 ` Chris Wilson
2019-08-14 9:02 ` Chris Wilson
2019-08-14 21:59 ` Stuart Summers
2019-08-13 17:41 ` [PATCH 3/3] drm/i915: Add module parameter to remove RCS engine Stuart Summers
2019-08-13 18:03 ` Chris Wilson
2019-08-13 18:11 ` Chris Wilson
2019-08-13 17:54 ` [PATCH 1/3] drm/i915: Use render class for MI_SET_CONTEXT Chris Wilson
2019-08-13 18:00 ` Stuart Summers
2019-08-13 18:05 ` Chris Wilson
2019-08-13 18:41 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork
2019-08-13 19:03 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-14 6:03 ` ✗ Fi.CI.IGT: failure " Patchwork
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