* [PATCH v8 1/6] drm/dp_mst: Add PBN calculation for DSC modes [not found] <20190826180507.17802-1-David.Francis@amd.com> @ 2019-08-26 18:05 ` David Francis 2019-08-26 18:36 ` Harry Wentland 0 siblings, 1 reply; 2+ messages in thread From: David Francis @ 2019-08-26 18:05 UTC (permalink / raw) To: dri-devel; +Cc: nouveau, David Francis, intel-gfx, amd-gfx With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Cc: amd-gfx@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: David Francis <David.Francis@amd.com> --- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +- drivers/gpu/drm/drm_dp_mst_topology.c | 16 ++++++++++++---- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 2 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- include/drm/drm_dp_mst_helper.h | 3 +-- 6 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index a0ed0154a9f0..abafb5221b44 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -235,7 +235,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( /* TODO need to know link rate */ - pbn = drm_dp_calc_pbn_mode(clock, bpp); + pbn = drm_dp_calc_pbn_mode(clock, bpp, false); slots = drm_dp_find_vcpi_slots(mst_mgr, pbn); ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots); diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index 82add736e17d..3e7b7553cf4d 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -3534,10 +3534,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status); * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode. * @clock: dot clock for the mode * @bpp: bpp for the mode. + * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel * * This uses the formula in the spec to calculate the PBN value for a mode. */ -int drm_dp_calc_pbn_mode(int clock, int bpp) +int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc) { u64 kbps; s64 peak_kbps; @@ -3555,11 +3556,18 @@ int drm_dp_calc_pbn_mode(int clock, int bpp) * peak_kbps *= (1006/1000) * peak_kbps *= (64/54) * peak_kbps *= 8 convert to bytes + * + * If the bpp is in units of 1/16, further divide by 16. Put this + * factor in the numerator rather than the denominator to avoid + * integer overflow */ numerator = 64 * 1006; denominator = 54 * 8 * 1000 * 1000; + if (dsc) + numerator /= 16; + kbps *= numerator; peak_kbps = drm_fixp_from_fraction(kbps, denominator); @@ -3570,19 +3578,19 @@ EXPORT_SYMBOL(drm_dp_calc_pbn_mode); static int test_calc_pbn_mode(void) { int ret; - ret = drm_dp_calc_pbn_mode(154000, 30); + ret = drm_dp_calc_pbn_mode(154000, 30, false); if (ret != 689) { DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", 154000, 30, 689, ret); return -EINVAL; } - ret = drm_dp_calc_pbn_mode(234000, 30); + ret = drm_dp_calc_pbn_mode(234000, 30, false); if (ret != 1047) { DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", 234000, 30, 1047, ret); return -EINVAL; } - ret = drm_dp_calc_pbn_mode(297000, 24); + ret = drm_dp_calc_pbn_mode(297000, 24, false); if (ret != 1063) { DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", 297000, 24, 1063, ret); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 2c5ac3dd647f..4f17f61f4453 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -61,7 +61,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, crtc_state->pipe_bpp = bpp; crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, - crtc_state->pipe_bpp); + crtc_state->pipe_bpp, false); slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, port, crtc_state->pbn); diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index 5c36c75232e6..c68783c1f3fa 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -782,7 +782,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder, const int bpp = connector->display_info.bpc * 3; const int clock = crtc_state->adjusted_mode.clock; - asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp); + asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp, false); } slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr, diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c index 2994f07fbad9..c997f88218f2 100644 --- a/drivers/gpu/drm/radeon/radeon_dp_mst.c +++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c @@ -514,7 +514,7 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder, mst_enc = radeon_encoder->enc_priv; - mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); + mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false); mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices; DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 2ba6253ea6d3..9116b2c95239 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -610,8 +610,7 @@ bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr, struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port); -int drm_dp_calc_pbn_mode(int clock, int bpp); - +int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc); bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn, int slots); -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v8 1/6] drm/dp_mst: Add PBN calculation for DSC modes 2019-08-26 18:05 ` [PATCH v8 1/6] drm/dp_mst: Add PBN calculation for DSC modes David Francis @ 2019-08-26 18:36 ` Harry Wentland 0 siblings, 0 replies; 2+ messages in thread From: Harry Wentland @ 2019-08-26 18:36 UTC (permalink / raw) To: Francis, David, dri-devel@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org On 2019-08-26 2:05 p.m., David Francis wrote: > With DSC, bpp can be fractional in multiples of 1/16. > > Change drm_dp_calc_pbn_mode to reflect this, adding a new > parameter bool dsc. When this parameter is true, treat the > bpp parameter as having units not of bits per pixel, but > 1/16 of a bit per pixel > > v2: Don't add separate function for this > > Cc: amd-gfx@lists.freedesktop.org > Cc: nouveau@lists.freedesktop.org > Cc: intel-gfx@lists.freedesktop.org > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> > Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Harry > Signed-off-by: David Francis <David.Francis@amd.com> > --- > .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +- > drivers/gpu/drm/drm_dp_mst_topology.c | 16 ++++++++++++---- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- > drivers/gpu/drm/nouveau/dispnv50/disp.c | 2 +- > drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- > include/drm/drm_dp_mst_helper.h | 3 +-- > 6 files changed, 17 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c > index a0ed0154a9f0..abafb5221b44 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c > @@ -235,7 +235,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( > > /* TODO need to know link rate */ > > - pbn = drm_dp_calc_pbn_mode(clock, bpp); > + pbn = drm_dp_calc_pbn_mode(clock, bpp, false); > > slots = drm_dp_find_vcpi_slots(mst_mgr, pbn); > ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots); > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c > index 82add736e17d..3e7b7553cf4d 100644 > --- a/drivers/gpu/drm/drm_dp_mst_topology.c > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c > @@ -3534,10 +3534,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status); > * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode. > * @clock: dot clock for the mode > * @bpp: bpp for the mode. > + * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel > * > * This uses the formula in the spec to calculate the PBN value for a mode. > */ > -int drm_dp_calc_pbn_mode(int clock, int bpp) > +int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc) > { > u64 kbps; > s64 peak_kbps; > @@ -3555,11 +3556,18 @@ int drm_dp_calc_pbn_mode(int clock, int bpp) > * peak_kbps *= (1006/1000) > * peak_kbps *= (64/54) > * peak_kbps *= 8 convert to bytes > + * > + * If the bpp is in units of 1/16, further divide by 16. Put this > + * factor in the numerator rather than the denominator to avoid > + * integer overflow > */ > > numerator = 64 * 1006; > denominator = 54 * 8 * 1000 * 1000; > > + if (dsc) > + numerator /= 16; > + > kbps *= numerator; > peak_kbps = drm_fixp_from_fraction(kbps, denominator); > > @@ -3570,19 +3578,19 @@ EXPORT_SYMBOL(drm_dp_calc_pbn_mode); > static int test_calc_pbn_mode(void) > { > int ret; > - ret = drm_dp_calc_pbn_mode(154000, 30); > + ret = drm_dp_calc_pbn_mode(154000, 30, false); > if (ret != 689) { > DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", > 154000, 30, 689, ret); > return -EINVAL; > } > - ret = drm_dp_calc_pbn_mode(234000, 30); > + ret = drm_dp_calc_pbn_mode(234000, 30, false); > if (ret != 1047) { > DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", > 234000, 30, 1047, ret); > return -EINVAL; > } > - ret = drm_dp_calc_pbn_mode(297000, 24); > + ret = drm_dp_calc_pbn_mode(297000, 24, false); > if (ret != 1063) { > DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", > 297000, 24, 1063, ret); > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 2c5ac3dd647f..4f17f61f4453 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -61,7 +61,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, > crtc_state->pipe_bpp = bpp; > > crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, > - crtc_state->pipe_bpp); > + crtc_state->pipe_bpp, false); > > slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, > port, crtc_state->pbn); > diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c > index 5c36c75232e6..c68783c1f3fa 100644 > --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c > +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c > @@ -782,7 +782,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder, > const int bpp = connector->display_info.bpc * 3; > const int clock = crtc_state->adjusted_mode.clock; > > - asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp); > + asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, bpp, false); > } > > slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr, > diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c > index 2994f07fbad9..c997f88218f2 100644 > --- a/drivers/gpu/drm/radeon/radeon_dp_mst.c > +++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c > @@ -514,7 +514,7 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder, > > mst_enc = radeon_encoder->enc_priv; > > - mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); > + mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false); > > mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices; > DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", > diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h > index 2ba6253ea6d3..9116b2c95239 100644 > --- a/include/drm/drm_dp_mst_helper.h > +++ b/include/drm/drm_dp_mst_helper.h > @@ -610,8 +610,7 @@ bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr, > struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port); > > > -int drm_dp_calc_pbn_mode(int clock, int bpp); > - > +int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc); > > bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, > struct drm_dp_mst_port *port, int pbn, int slots); > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-08-26 18:05 ` [PATCH v8 1/6] drm/dp_mst: Add PBN calculation for DSC modes David Francis
2019-08-26 18:36 ` Harry Wentland
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